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NXP first to offer one silicon platform for digital and analog HD LCD TVs for all consumer markets globally

Eindhoven, The Netherlands NXP, the newly independent semiconductor company founded by Philips, today announced two new TV reference designs: NexperiaTM TV520/32 for DVB/PAL and Nexperia TV507 for analog TVs. Both reference designs are based on one global silicon platform that enables TV manufacturers to develop hybrid digital and analog LCD TV sets with best-in-class picture quality and unique design-in benefits.

With the TV520/32 for DVB/PAL and the earlier introduced TV520/30 and TV520/20 for ATSC, NXP is now able to offer one hybrid platform for all regions worldwide. The TV507 is based on the same platform and offers the analog-only version, thus enabling NXPs customers to spin off an analog-only product from the same platform investment. All members of the family are pin-to-pin compatible, which means TV designers can re-use the investments across a range of products.

Set makers profit from reduced development costs, easy design-in processes and shorter lead times. With its unique features, the TV520 platform allows NXPs customers to develop a product and bring it to market in as little as three months. Consumers benefit from having a uniform user interface for analog as well as digital channels. Furthermore, it enables a new, brilliant viewing experience as bestin-class picture quality can be offered at an affordable price point.

"Our solution is unique as it is based on one silicon platform serving the two worlds of digital and analog TV sets. It is cost-effective and efficient for manufacturers to only work with one platform and offer two different end products with high picture quality," said Jos Klippert, marketing director, Digital TV solutions, NXP. "As more High Definition TV content becomes available, consumers are seeking LCD TVs that offer the highest quality analog as well as digital viewing experience at an affordable price."

The TV520 reference design is built on the Nexperia Home media processor, which provides the IP blocks for MPEG de-multiplexing and decoding, video scaling, de-interlacing, noise reduction, all kinds of video featuring, video rendering, audio decoding, digital-to-analog conversion and audio featuring. It also contains a High Definition Multimedia Interface (HDMI) and an SD/HD analog component input. The TV520 reference design is also scalable to higher-end TV solutions by simply adding a variety of NXPs companion processors.


The reference design will be available in Europe and APAC in Q1, 2007.

Miércoles, 06 Septiembre, 2006 - 12:28
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