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| Actel Drives Down Total System Cost with the Industry's Fastest FPGA Power-Up So | |||||
MOUNTAIN VIEW, Calif. — Delivering the programmable logic industry's fastest power-up performance, Actel Corporation (Nasdaq: ACTL) today released new results showing that its nonvolatile field-programmable gate arrays (FPGAs) offer up to 4000 times better power-on response time than competing SRAM-based FPGAs. Additionally, Actel's live at power-up (LAPU) single-chip FPGAs drive down total system costs by eliminating the need for additional power-up and initialization circuitry. The LAPU nature of Actel's nonvolatile FPGA technologies makes them optimal solutions for automotive, consumer, medical, military and other applications that require immediate operation as well as low total system cost. Further, to help simplify selection of LAPU devices Actel has created a new LAPU classification system to quantify initialization capabilities of various semiconductor solutions. Power-Up Stage Classification To help simplify the selection of LAPU devices, Actel has created a new LAPU classification system to quantify the initialization capabilities of various semiconductor solutions. The Actel LAPU device classification system has three levels: live at power-up (Level 0), live after power-up (Level 1) and live after system initialization (Level 2). Level 0 LAPU devices are operational between power-on and power-up (the time at which the applied voltage has reached the lower limit of system voltage and is stable) and include Actel's devices and other nonvolatile FPGAs, ASICs and some ASSPs. Level 1 LAPU devices require a configuration download from internal memory but are operational before system initialization and include ASSPs, flash-in-package SRAM FPGAs and most CPLDs. Level 2 LAPU devices are operational only after the initialization of system clocks, resets, interfaces and memories and include most SRAM-based FPGAs and processors. "FPGAs based on volatile SRAM make system start-up complex and expensive due to their need to load configuration data from external memory before they are operational," said Martin Mason, director of product marketing at Actel. "There is a lower cost and simpler solution available using Level 0 LAPU devices like Actel's FPGAs, which simplify application startup, reduce total system cost, PCB size and power consumption, as well as increase system reliability and security." LAPU Effects Design Complexity and Total System Cost Live at power-up FPGAs are the only devices that can assist in system start-up tasks, system configuration and supervision during voltage ramp-up, which can result in total system cost savings of 50 percent or more. Martin Alcock, president and CEO of Integen Technologies Inc. said, "By using flash-based, live at power-up devices instead of SRAM-based FPGAs in our hospitality products, we were able to reduce our overall system component count by eliminating not only the need for external program memories but also reducing the design requirements of our power supplies at the same time. We value the live at power-up capabilities offered by Actel's single-chip FPGAs, and we plan to leverage this technology for future designs." | |||||
Jueves, 06 Octubre, 2005 - 11:00 | |||||
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