1
FN3166.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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All other trademarks mentioned are the property of their respective owners.
ICM7216B, ICM7216D
8-Digit, Multi-Function, Frequency Counters/Timers
The ICM7216B is a fully integrated Timer Counters with LED display drivers. They combine a high frequency oscillator, a decade timebase counter, an 8-decade data counter and latches, a 7-segment decoder, digit multiplexers and 8- segment and 8-digit drivers which directly drive large multiplexed LED displays. The counter inputs have a maximum frequency of 10MHz in frequency and unit counter modes and 2MHz in the other modes. Both inputs are digital inputs. In many applications, amplification and level shifting will be required to obtain proper digital signals for these inputs.
The ICM7216B can function as a frequency counter, period counter, frequency ratio (fA/fB) counter, time interval counter or as a totalizing counter. The counter uses either a 10MHz or 1MHz quartz crystal timebase. For period and time interval, the 10MHz timebase gives a 0.1
s resolution.
In period average and time interval average, the resolution can be in the nanosecond range. In the frequency mode, the user can select accumulation times of 0.01s, 0.1s, 1s and 10s. With a 10s accumulation time, the frequency can be displayed to a resolution of 0.1Hz in the least significant digit. There is 0.2s between measurements in all ranges.
The ICM7216D functions as a frequency counter only, as described above.
All versions of the ICM7216 incorporate leading zero blanking. Frequency is displayed in kHz. In the ICM7216B, time is displayed in
s. The display is multiplexed at 500Hz
with a 12.2% duty cycle for each digit. The ICM7216B and ICM7216D are designed for common cathode displays with typical peak segment currents of 12mA. In the display off mode, both digit and segment drivers are turned off, enabling the display to be used for other functions.
Features, All Versions
Functions as a frequency counter (DC to 10MHz)
Four internal gate times: 0.01s, 0.1s, 1s, 10s in frequency
counter mode
Directly drives digits and segments of large multiplexed
LED displays (common anode and common cathode versions)
Single nominal 5V supply required
Highly stable oscillator, uses 1MHz or 10MHz crystal
Internally generated decimal points, interdigit blanking,
leading zero blanking and overflow indication
Display off mode turns off display and puts chip into low
power mode
Hold and reset inputs for additional flexibility
Features, ICM7216B
Functions also as a period counter, unit counter,
frequency ratio counter or time interval counter
1 cycle, 10 cycles, 100 cycles, 1000 cycles in period,
frequency ratio and time interval modes
Measures period from 0.5
s to 10s
Features, ICM7216D
Decimal point and leading zero banking may be externally
selected
Part Number Information
PART
NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
PKG. NO.
ICM7216BlPl
-25 to 85
28 Ld PDIP
E28.6
ICM7216DlPl
-25 to 85
28 Ld PDIP
E28.6
Data Sheet
January 2004
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pport
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SIL or
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il.com
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2
Pinouts
ICM7216B (PDIP)
COMMON CATHODE
TOP VIEW
ICM7216D (PDIP)
COMMON CATHODE
TOP VIEW
CONTROL INPUT
INPUT B
FUNCTION INPUT
DIGIT 1 OUTPUT
DIGIT 3 OUTPUT
DIGIT 2 OUTPUT
DIGIT 4 OUTPUT
V
SS
DIGIT 5 OUTPUT
DIGIT 6 OUTPUT
DIGIT 7 OUTPUT
DIGIT 8 OUTPUT
RESET INPUT
RANGE INPUT
INPUT A
OSC OUTPUT
OSC INPUT
EXT OSC INPUT
DECIMAL POINT OUTPUT
SEG
e
OUTPUT
SEG
d
OUTPUT
V
DD
SEG
b
OUTPUT
SEG
c
OUTPUT
SEG
f
OUTPUT
HOLD INPUT
SEG
g
OUTPUT
SEG
a
OUTPUT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CONTROL INPUT
MEASUREMENT IN PROGRESS
DIGIT 1 OUTPUT
DIGIT 3 OUTPUT
DIGIT 2 OUTPUT
DIGIT 4 OUTPUT
V
SS
DIGIT 5 OUTPUT
DIGIT 6 OUTPUT
DIGIT 7 OUTPUT
DIGIT 8 OUTPUT
RESET INPUT
EX. DECIMAL POINT INPUT
RANGE INPUT
INPUT A
OSC OUTPUT
OSC INPUT
EXT OSC INPUT
DECIMAL POINT OUTPUT
SEG
e
OUTPUT
SEG
d
OUTPUT
V
DD
SEG
b
OUTPUT
SEG
c
OUTPUT
SEG
f
OUTPUT
HOLD INPUT
SEG
g
OUTPUT
SEG
a
OUTPUT
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ICM7216B, ICM7216D
3
Functional Block Diagram
NOTES:
1. Function input and input B available on ICM7216B only.
2. Ext DP input and MEASUREMENT IN PROGRESS output available on ICM7216D only.
STORE AND
RESET LOGIC
REFERENCE
RANGE SELECT
DIGIT
DECODER
OSC
÷
10
4
OR
÷
10
5
RANGE
CONTROL
DP
DECODER
SEGMENT
INPUT
INPUT
FN
MAIN
DRIVERS
COUNTER
÷
10
3
LOGIC
LOGIC
FF
CONTROL
LOGIC
CONTROL
LOGIC
CONTROL
LOGIC
DATA LATCHES AND
OUTPUT MUX
MAIN
÷
10
3
COUNTER
SELECT
CONTROL
LOGIC
LOGIC
DRIVER
LOGIC
EXT
OSC
INPUT
OSC
INPUT
OSC
OUTPUT
RESET
INPUT
INPUT A
FUNCTION
INPUT
(NOTE 1)
D
CL
EN
CL
OVERFLOW
STORE
100Hz
Q
HOLD
INPUT
INPUT B
(NOTE 1)
MEASUREMENT IN PROGRESS OUTPUT (NOTE 2)
SEGMENT OUTPUTS
EXT DP INPUT (NOTE 2)
CONTROL INPUT
RANGE INPUT
DIGIT OUTPUTS (8)
(8)
3
8
8
5
6
4
7
8
6
4
4
4
4
4
4
4
4
ICM7216B, ICM7216D
4
Absolute Maximum Ratings
Thermal Information
Maximum Supply Voltage (V
DD
- V
SS
) . . . . . . . . . . . . . . . . . . 6.5V
Maximum Digit Output Current . . . . . . . . . . . . . . . . . . . . . . . 400mA Maximum Segment Output Current. . . . . . . . . . . . . . . . . . . . . 60mA Voltage On Any Input or Output Terminal (Note 3). . . . . . . . . . . (V
DD
+0.3V) to (V
SS
-0.3V)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -25
o
C to 85
o
C
Thermal Resistance (Typical, No
Θ
JA
(
o
C/W)
Θ
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
55
N/A
Maximum Junction Temperature
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. The ICM7216 may be triggered into a destructive latchup mode if either input signals are applied before the power supply is applied or if input
or outputs are forced to voltages exceeding V
DD
to V
SS
by more than 0.3V.
4.
Θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
DD
= 5.0V, V
SS
= 0V, T
A
= 25
o
C, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ICM7216B
Operating Supply Current, I
DD
Display Off, Unused Inputs to V
SS
-
2
5
mA
Supply Voltage Range (V
DD
-V
SS
), V
SUPPLY
INPUT A, INPUT B Frequency at f
MAX
4.75
-
6.0
V
Maximum Frequency INPUT A, Pin 28, f
A(MAX)
Figure ction = Frequency, Ratio, Unit Counter
10
-
-
MHz
Function = Period, Time Interval
2.5
-
-
MHz
Maximum Frequency INPUT B, Pin 2, f
B(MAX)
Figure
2.5
-
-
MHz
Minimum Separation INPUT A to INPUT B Time Interval Function
Figure
250
-
-
ns
Maximum Oscillator Frequency and External Oscillator Frequency, f
OSC
10
-
-
MHz
Minimum External Oscillator Frequency, f
OSC
-
-
100
kHz
Oscillator Transconductance, g
M
V
DD
= 4.75V, T
A
= 85 C
2000
-
-
S
Multiplex Frequency, f
MUX
f
OSC
= 10MHz
-
500
-
Hz
Time Between Measurements
f
OSC
= 10MHz
-
200
-
ms
Input Voltages: Pins 2, 13, 25, 27, 28
Input Low Voltage, V
INL
-
-
1.0
V
Input High Voltage, V
lNH
3.5
-
-
V
Input Resistance to V
DD
Pins 13, 24, R
IN
V
IN
= V
DD
-1.0V
100
400
-
k
Ω
Input Leakage Pins 27, 28, 2, I
ILK
-
-
20
A
Input Range of Change, dV
lN
/dt
Supplies Well Bypassed
-
15
-
mV/
s
Digit Driver: Pins 4, 5, 6, 7, 9, 10, 11, 12
Low Output Current, I
OL
V
OUT
= V
SS
+1.3V
50
75
-
mA
High Output Current, I
OH
V
OUT
= V
DD
-2.5V
-
-100
-
A
Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23
High Output Current, I
OH
V
OUT
= V
DD
-2.0V
-10
-
-
mA
Leakage Current, I
SLK
V
OUT
= V
DD
-2.5V
-
-
10
A
Multiplex Inputs: Pins 1, 3, 14
ICM7216B, ICM7216D
5
Input Low Voltage, V
INL
-
-
V
DD
-
2.0
V
Input High Voltage, V
lNH
V
DD
-
0.8
-
-
V
Input Resistance to V
DD
,
R
IN
V
lN
= V
DD
-2.5V
100
360
-
k
Ω
ICM7216D
Operating Supply Current, I
DD
Display Off, Unused Inputs to V
SS
-
2
5
mA
Supply Voltage Range (V
DD
-V
SS
), V
SUPPLY
INPUT A Frequency at f
MAX
4.75
-
6.0
V
Maximum Frequency INPUT A, Pin 28, f
A(MAX)
Figure
10
-
-
MHz
Maximum Oscillator Frequency and External Oscillator Frequency, f
OSC
10
-
-
MHz
Minimum External Oscillator Frequency, f
OSC
-
-
100
kHz
Oscillator Transconductance, g
M
V
DD
= 4.75V, T
A
= 85 C
2000
-
-
S
Multiplex Frequency, f
MUX
f
OSC
= 10MHz
-
500
-
Hz
Time Between Measurements
f
OSC
= 10MHz
-
200
-
ms
Input Voltages: Pins 12, 27, 28
Input Low Voltage, V
INL
-
-
1.0
V
Input High Voltage, V
INH
3.5
-
-
V
Input Resistance to V
DD,
Pins 12, 24, R
IN
V
IN
= V
DD
-1.0V
100
400
-
k
Ω
Input Leakage, Pins 27, 28, I
ILK
-
-
20
A
Output Current, Pin 2, I
OL
V
OL
= +0.4V
0.36
-
-
mA
Output Current, Pin 2, I
OH
V
OH
= V
DD
-0.8V
265
-
-
A
Input Rate of Change, dV
lN
/dt
Supplies Well Bypassed
-
15
-
mV/
s
Digit Driver: Pins 3, 4, 5, 6, 8, 9, 10, 11
Low Output Current, I
OL
V
OUT
= +1.3V
50
75
-
mA
High Output Current, I
OH
V
OUT
= V
DD
-2.5V
-
100
-
A
Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23
High Output Current, I
OH
V
OUT
= V
DD
-2.0V
10
15
mA
Leakage Current, I
SLK
V
OUT
= V
DD
-2.5V
-
-
10
A
Multiplex Inputs: Pins 1, 13, 14
Input Low Voltage, V
lNL
-
-
V
DD
-
2.0
V
Input High Voltage, V
INH
V
DD
-
0.8
-
-
V
Input Resistance to V
DD
,
R
lN
V
IN
= V
DD
-1.0V
100
360
-
k
Ω
Electrical Specifications
V
DD
= 5.0V, V
SS
= 0V, T
A
= 25
o
C, Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ICM7216B, ICM7216D
6
Timing Diagram
MEASUREMENT
IN PROGRESS
(INTERNAL ON
7216B)
30ms TO 40ms
INTERNAL
STORE
INTERNAL
RESET
INPUT A
INPUT B
PRIMING EDGES
PRIMING
FUNCTION: TIME INTERVAL
UPDATE
190ms TO 200ms
40ms
60ms
40ms
MEASUREMENT INTERVAL
250ns MIN
MEASURED
INTERVAL
(FIRST)
MEASURED
INTERVAL
(LAST)
UPDATE
NOTE:
5. If range is set to 1 event, first and last measured interval will coincide.
FIGURE 1. WAVEFORMS FOR TIME INTERVAL MEASUREMENT (OTHERS ARE SIMILAR, BUT WITHOUT PRIMING PHASE)
Typical Performance Curves
FIGURE 2. f
A
(MAX), f
B
(MAX) AS A FUNCTION OF SUPPLY
FIGURE 3. TYPICAL I
SEG
vs V
DD
-V
OUT
f
A
(MAX) FREQUENCY UNIT COUNTER,
FREQUENCY RATIO MODES
f
A
(MAX) f
B
(MAX) PERIOD,
TIME INTERVAL MODES
T
A
= 25
o
C
V
DD
-V
SS
(V)
FREQUENCY (MHz
)
20
15
10
5
0
3
4
5
6
85
o
C
-20
o
C
4.5
≤ V
DD
≤ 6V
30
20
10
0
0
1
2
3
V
DD
-V
OUT
(V)
I
SE
G
(mA)
25
o
C
ICM7216B, ICM7216D
7
Description
INPUTS A and B
INPUTS A and B are digital inputs with a typical switching threshold of 2V at V
DD
= 5V. For optimum performance the
peak-to-peak input signal should be at least 50% of the supply voltage and centered about the switching voltage. When these inputs are being driven from TTL logic, it is desirable to use a pullup resistor. The circuit counts high to low transitions at both inputs. (INPUT B is available only on lCM7216B).
Note that the amplitude of the input should not exceed the device supply (above the VDD and below the VSS) by more than 0.3V, otherwise the device may be damaged.
Multiplexed Inputs
The FUNCTION, RANGE, CONTROL and EXTERNAL DECIMAL POINT inputs are time multiplexed to select the function desired. This is achieved by connecting the appropriate Digit driver output to the inputs. The function, range and control inputs must be stable during the last half of each digit output, (typically 125
s). The multiplexed inputs
are active low for the common cathode lCM7216B and lCM7216D.
Noise on the multiplex inputs can cause improper operation. This is particularly true when the
unit counter
mode of
operation is selected, since changes in voltage on the digit drivers can be capacitively coupled through the LED diodes to the multiplex inputs. For maximum noise immunity, a 10k
Ω
resistor should be placed in series with the multiplexed
inputs as shown in the application circuits.
Tabllected by each digit for these inputs.
.
FIGURE 4. TYPICAL I
DIGIT
vs V
OUT
FIGURE 5. TYPICAL I
DIGIT
vs V
OUT
Typical Performance Curves
(Continued)
85
o
C
-20
o
C
V
DD
= 5V
200
150
100
0
0
1
2
3
V
OUT
(V)
I
DIGIT
(m
A
)
25
o
C
50
V
DD
= 5.5V
200
50
100
0
0
1
2
3
V
OUT
(V)
I
DIGIT
(mA)
50
T
A
= 25
o
C
V
DD
= 4.5V
V
DD
= 5V
TABLE 1. MULTIPLEXED INPUT FUNCTIONS
FUNCTION
DIGIT
FUNCTION INPUT (Pin 3, lCM7216B Only)
Frequency
D1
Period
D8
Frequency Ratio
D2
Time Interval
D5
Unit Counter
D4
Oscillator Frequency
D3
RANGE INPUT, Pin 14
0.01s/1 Cycle
D1
0.1s/10 Cycles
D2
1s/100 Cycles
D3
10s/1K Cycles
D4
CONTROL INPUT, Pin 1
Display Off
D4 and
Hold
Display Test
D8
1MHz Select
D2
External Oscillator Enable
D1
External Decimal Point Enable
D3
External DP INPUT (Pin 13, ICM7216D Only)
Decimal point is output for same digit that is connected to this input.
ICM7216B, ICM7216D
8
9.
Function Input
The six functions that can be selected are:
Frequency,
Period, Time Interval, Unit Counter, Frequency Ratio
and
Oscillator Frequency.
This input is available on the
lCM7216B only.
The implementation of different functions is done by routing the different signals to two counters, called Main Counter and Reference Counter. A simplified block diagram of the device for functions realization is shown in FiTable shows which signals will be routed to each counter in different cases. The output of the Main Counter is the information which goes to the display. The Reference Counter divides its input by 1, 10, 100 and 1000. One of these outputs will be selected through the range selector and drive the enable input of the Main Counter. This means that the Reference Counter, along with its associated blocks, directs the Main Counter to begin counting and determines the length of the counting period. Note that Figuoes not show the complete functional diagram (See the Functional Block Diagram). After the end of each counting period, the output of the Main Counter will be latched and displayed, then the counter will be reset and a new measurement cycle will begin. Any change in the FUNCTION INPUT will stop the present measurement without updating the display and then initiate a new measurement. This prevents an erroneous first reading after the FUNCTION INPUT is changed. In all cases, the 1-0 transitions are counted or timed.
INPUT A
4.5V
0.5V
50ns MIN
tr = tf = 10ns
COUNTED TRANSITIONS
50ns MIN
FIGURE 6. WAVEFORM FOR GUARANTEED MINIMUM
f
A
(MAX) FUNCTION = FREQUENCY,
FREQUENCY RATIO, UNIT COUNTER
INPUT A OR
INPUT B
4.5V
0.5V
MEASURED
INTERVAL
250ns
MIN
tr = tf = 10s
250ns
MIN
FIGURE 7. WAVEFORM FOR GUARANTEED MINIMUM
f
B
(MAX) AND f
A
(MAX) FOR FUNCTION = PERIOD
AND TIME INTERVAL
INTERNAL CONTROL
100Hz
INPUT A
INPUT B
INPUT
SELECTOR
INTERNAL OR
EXTERNAL
OSCILLATOR
INPUT A
ENABLE
CLOCK
MAIN COUNTER
RANGE SELECTOR
÷1
÷10
÷100 ÷1000
INTERNAL CONTROL
INTERNAL CONTROL
CLOCK
INTERNAL CONTROL
INPUT
SELECTOR
REFERENCE COUNTER
FIGURE 8. SIMPLIFIED BLOCK DIAGRAM OF FUNCTIONS IMPLEMENTATION
TABLE 2. 7216B INPUT ROUTING
FUNCTION
MAIN
COUNTER
REFERENCE COUNTER
Frequency (f
A
)
Input A
100Hz (Oscillator
÷
10
5
or
10
4
)
Period (t
A
)
Oscillator
Input A
Ratio (f
A
/f
B
)
Input A
Input B
Time Interval (A
B)
Oscillator
Input A Input B
Unit Counter (Count A)
Input A
Not Applicable
Osc. Freq. (f
OSC
)
Oscillator
100Hz (Oscillator
÷
10
5
or
10
4
)
TABLE 2. 7216B INPUT ROUTING
FUNCTION
MAIN
COUNTER
REFERENCE COUNTER
ICM7216B, ICM7216D
9
Frequency
- In this mode input A is counted by the Main
Counter for a precise period of time. This time is determined by the time base oscillator and the selected range. For the 10MHz (or 1MHz) time base, the resolutions are 100Hz, 10Hz, 1Hz and 0.1Hz. The decimal point on the display is set for kHz reading.
Period
- In this mode, the timebase oscillator is counted by
the Main Counter for the duration of 1, 10, 100 or 1000 (range selected) periods of the signal at input A. A 10MHz timebase gives resolutions of 0.1
s to 0.0001
s for 1000
periods averaging. Note that the maximum input frequency for period measurement is 2.5MHz.
Frequency Ratio
- In this mode, the input A is counted by
the Main Counter for the duration of 1, 10, 100 or 1000 (range selected) periods of the signal at input B. The frequency at input A should be higher than input B for meaningful result. The result in this case is unitless and its resolution can go up to three digits after decimal point.
Time Interval
- In this mode, the timebase oscillator is
counted by the Main Counter for the duration of a 1-0 transition of input A until a 1-0 transition of input B. This means input A starts the counting and input B stops it. If other ranges, except 0.01s/1 cycle are selected the sequence of input A and B transitions must happen 10, 100 or 1000 times until the display becomes updated; note this when measuring long time intervals to give enough time for measurement completion. The resolution in this mode is the same as for period measurement. See the
Time Interval Measurement
section also.
Unit Counter
- In this mode, the Main Counter is always
enabled. The input A is counted by the Main Counter and displayed continuously.
Oscillator Frequency
- In this mode, the device makes a
frequency measurement on its timebase. This is a self test mode for device functionality check. For 10MHz timebase the display will show 10000.0, 10000.00, 10000.000 and Overflow in different ranges.
Range Input
The RANGE INPUT selects whether the measurement period is made for 1, 10, 100 or 1000 counts of the Reference Counter. As it is shown in Table this gives different counting windows for frequency measurement and various cycles for other modes of measurement.
In all functional modes except Unit Counter, any change in the RANGE INPUT will stop the present measurement without updating the display and then initiate a new measurement. This prevents an erroneous first reading after the RANGE INPUT is changed.
Control Input
Unlike the other multiplexed inputs, to which only one of the digit outputs can be connected at a time, this input can be
tied to different digit lines to select combination of controls. In this case, isolation diodes must be used in digit lines to avoid crosstalk between them (see Figurehe direction of diodes depends on the device version, common anode or common cathode. For maximum noise immunity at this input, in addition to the 10K resistor which was mentioned before, a 39pF to 100pF capacitor should also be placed between this input and the VDD or VSS (See Figure
Display Off
- To disable the display drivers, it is necessary to
tie the D4 line to the CONTROL INPUT and have the HOLD input at V
DD
. While in Display Off mode, the segments and
digit drivers are all off, leaving the display lines floating, so the display can be shared with other devices. In this mode, the oscillator continues to run with a typical supply current of 1.5mA with a 10MHz crystal, but no measurements are made and multiplexed inputs are inactive. A new measurement cycle will be initiated when the HOLD input is switched to V
SS
.
Display Test
- Display will turn on with all the digits showing
8s and all decimal points on. The display will be blanked if Display Off is selected at the same time.
1MHz Select
- The 1MHz select mode allows use of a 1MHz
crystal with the same digit multiplex rate and time between measurement as with a 10MHz crystal. This is done by dividing the oscillator frequency by 10
4
rather than 10
5
. The
decimal point is also shifted one digit to the right in period and time interval, since the least significant digit will be in
s
increment rather than 0.1
s increment.
External Oscillator Enable
- In this mode, the signal at EXT
OSC INPUT is used as a timebase instead of the on-board crystal oscillator (built around the OSC INPUT, OSC OUTPUT inputs). This input can be used for an external stable temperature compensated crystal oscillator or for special measurements with any external source. The on- board crystal oscillator continues to work when the external oscillator is selected. This is necessary to avoid hang-up problems, and has no effect on the chip's functional operation. If the on-board oscillator frequency is less than 1MHz or only the external oscillator is used,
the OSC INPUT
must be connected to the EXT OSC INPUT
providing the
timebase has enough voltage swing for OSC INPUT (See
Electrical Specifications
). If the external timebase is TTL
level a pullup resistor must be used for OSC INPUT. The other way is to put a 22M
Ω
resistor between OSC INPUT
and OSC OUTPUT and capacitively couple the EXT OSC INPUT to OSC INPUT. This will bias the OSC INPUT at its threshold and the drive voltage will need to be only 2VP-P. The external timebase frequency must be greater than 100kHz or the chip will reset itself to enable the on-board oscillator.
External Decimal Point Enable
- In this mode, the EX DP
INPUT is enabled (lCM7216D only). A decimal point will be displayed for the digit that its output line is connected to this
ICM7216B, ICM7216D
10
input (EX DP INPUT). Digit 8 should not be used since it will override the overflow output. Leading zero blanking is effective for the digits to the left of selected decimal point.
Hold Input
Except in the
unit counter mode
, when the HOLD input is
at VDD, any measurement in progress (before STORE goes low) is stopped, the main counter is reset and the chip is held ready to initiate a new measurement as soon as HOLD goes low. The latches which hold the main counter data are not updated, so the last complete measurement is displayed. In
unit counter
mode when HOLD input is at VDD, the
counter is not stopped or reset, but the display is frozen at that instantaneous value. When HOLD goes low the count continues from the new value in the new counter.
RESET Input
The RESET input resets the main counter, stops any measurement in progress, and enables the main counter latches, resulting in an all zero output. A capacitor to ground will prevent any hang-ups on power-up.
MEASUREMENT IN PROGRESS
This output is provided in lCM7216D. It stays low during measurements and goes high for intervals between measurements. It is provided for system interfacing and can drive a low power Schottky TTL or one ECL load if the ECL device is powered from the same supply as lCM7216D.
Decimal Point Position
Tablews the decimal point position for different modes of lCM7216 operation. Note that the digit 1 is the least significant digit. Tabl for 10MHz timebase frequency.
Overflow Indication
When overflow happens in any measurement it will be indicated on the decimal point of the digit 8. A separate LED indicator can be used. Figure shows how to connect this indicator.
Overflow will be indicated on the decimal point output of digit 8. A separate LED overflow indicator can be connected as follows:
Time Interval Measurement
When in the
time interval
mode and measuring a single
event, the lCM7216B must first be primed prior to measuring the event of interest. This is done by first generating a negative going edge on Channel A followed by a negative going edge on Channel B to start the measurement interval. The inputs are then primed ready for the measurement. Positive going edges on A and B, before or after the priming, will be needed to restore the original condition.
Priming can be easily accomplished using the circuit in Fi(next page).
DEVICE
CATHODE
ANODE
ICM7216B/D
D8
Decimal Point
a
b
c
d
f
g
e
DP
FIGURE 9. SEGMENT IDENTIFICATION AND DISPLAY FONT
TABLE 3. DECIMAL POINT POSITIONS
RANGE
FREQUENCY
PERIOD
FREQUENCY
RATIO
TIME
INTERVAL
UNIT
COUNTER
OSCILLATOR
FREQUENCY
0.01s/1 Cycle
D2
D2
D1
D2
D1
D2
0.1s/10 Cycle
D3
D3
D2
D3
D1
D3
1s/100 Cycle
D4
D4
D3
D4
D1
D4
10s/1K Cycle
D5
D5
D4
D5
D1
D5
ICM7216B, ICM7216D
11
Following the priming procedure (when in single event or 1 cycle range) the device is ready to measure one (only) event.
When timing repetitive signals, it is not necessary to prime the lCM7216B as the first alternating signal states automatically prime the device. See Fi
During any time interval measurement cycle, the lCM7216B require 200ms following B going low to update all internal logic. A new measurement cycle will not take place until completion of this internal update time.
Oscillator Considerations
The oscillator is a high gain CMOS inverter. An external resistor of 10M
Ω
to 22M
Ω
should be connected between the
OSCillator INPUT and OUTPUT to provide biasing. The oscillator is designed to work with a parallel resonant 10MHz quartz crystal with a static capacitance of 22pF and a series resistance of less than 35
Ω
.
For a specific crystal and load capacitance, the required gM can be calculated as follows:
CO = Crystal Static Capacitance
RS = Crystal Series Resistance
CIN = Input Capacitance
COUT = Output Capacitance
ω
= 2
π
f
The required gM should not exceed 50% of the gM specified for the lCM7216 to insure reliable startup. The OSCillator
INPUT and OUTPUT pins each contribute about 5pF to CIN and COUT. For maximum stability of frequency, CIN and COUT should be approximately twice the specified crystal static capacitance.
In cases where non decade prescalers are used it may be desirable to use a crystal which is neither 10MHz or 1MHz. In that case both the multiplex rate and time between measurements will be different. The multiplex rate is
for 10MHz mode and
for
the 1MHz mode. The time between measurements is
in the 10MHz mode and
in the 1MHz mode.
The crystal and oscillator components should be located as close to the chip as practical to minimize pickup from other signals. Coupling from the EXTERNAL OSClLLATOR INPUT to the OSClLLATOR OUTPUT or INPUT can cause undesirable shifts in oscillator frequency.
Display Considerations
The display is multiplexed at a 500Hz rate with a digit time of 244
s. An interdigit blanking time of 6
s is used to prevent
display ghosting (faint display of data from previous digit superimposed on the next digit). Leading zero blanking is provided, which blanks the left hand zeroes after decimal point or any non zero digits. Digits to the right of the decimal point are always displayed. The leading zero blanking will be disabled when the Main Counter overflows.
The lCM7216B and lCM7216D are designed to drive common cathode displays at peak current of 15mA/segment using displays with VF = 1.8V at 15mA. Resistors can be added in series with the segment drivers to limit the display current in very efficient displays, if required. The
Typical
Performance Curves
show the digit and segment currents as
a function of output voltage.
To get additional brightness out of the displays, VDD may be increased up to 6.0V. However, care should be taken to see that maximum power and current ratings are not exceeded.
The segment and digit outputs in lCM7216s are not directly compatible with either TTL or CMOS logic when driving LEDs. Therefore, level shifting with discrete transistors may be required to use these outputs as logic signals.
Accuracy
In a Universal Counter crystal drift and quantization effects cause errors. In
frequency, period
and
time interval
modes, a signal derived from the oscillator is used in either the Reference Counter or Main Counter. Therefore, in these modes an error in the oscillator frequency will cause an identical error in the measurement. For instance, an oscillator temperature coefficient of
will cause a
measurement error of
SIGNAL A
SIGNAL B
INPUT A
INPUT B
V
DD
N.O.
100K
1N914
V
DD
150K
1
0.1
F
10K
10nF
1
1
1
2
2
V
SS
V
SS
V
SS
PRIME
FIGURE 10. PRIMING CIRCUIT, SIGNALS A AND B BOTH
HIGH OR LOW
DEVICE
TYPE
1
CD4049B Inverting Buffer
2
CD4070B Exclusive - OR
g
M
ω
2
C
IN
C
OUT
R
S
1
C
O
C
L
--------
+
2
=
where C
L
C
IN
C
OUT
C
IN
C
OUT
+
---------------------------------
=
f
MUX
f
OSC
2
10
4
×
-------------------
=
f
MUX
f
OSC
2
10
3
×
-------------------
=
2
10
6
×
f
OSC
-------------------
2
10
5
×
f
OSC
-------------------
20
PPM
C
o
-------------------
20
PPM
C
o
-------------------
ICM7216B, ICM7216D
12
In addition, there is a quantization error inherent in any digital measurement of
1 count. Clearly this error is reduced by
displaying more digits. In the
frequency
mode the maximum
accuracy is obtained with high frequency inputs and in
period
mode maximum accuracy is obtained with low frequency inputs (as can be seen in Figu
time interval
measurements there can be an error of 1 count per interval. As a result there is the same inherent accuracy in all ranges as shown in Fi
frequency ratio
measurement can
be more accurately obtained by averaging over more cycles of INPUT B as shown in
FIGURE 11. MAXIMUM ACCURACY OF FREQUENCY AND
PERIOD MEASUREMENTS DUE TO LIMITATIONS OF QUANTIZATION ERRORS
FIGURE 12. MAXIMUM ACCURACY OF TIME INTERVAL
MEASUREMENT DUE TO LIMITATIONS OF QUANTIZATION ERRORS
FIGURE 13. MAXIMUM ACCURACY FOR FREQUENCY RATIO MEASUREMENT DUE TO LIMITATION OF QUANTIZATION ERRORS
FREQUENCY MEASURE
0
2
4
8
1
10
10
3
10
7
FREQUENCY (Hz)
MAX
IMUM NU
MBE
R
O
F
6
0.01s
SIGNIFICANT D
IGITS
10
5
0.1s
10s
1s
PERIOD MEASURE f
OSC
= 10MHz
1 CYCLE
10 CYCLES
10
3
CYCLES
10
2
CYCLES
MAXIMUM TIME INTERVAL FOR 10
3
INTERVALS
MAXIMUM TIME INTERVAL FOR 10
2
INTERVALS
MAXIMUM TIME INTERVAL
FOR 10 INTERVALS
10
3
10
4
10
5
10
6
10
7
10
8
10
2
10
1
0
1
2
3
4
5
6
7
8
TIME INTERVAL (
s)
MAXIMU
M NUMBER OF
SIGNIFICANT
DIGITS
1 CYCLE 10 CYCLES
10
3
CYCLES
10
2
CYCLES
RANGE
10
3
10
4
10
5
10
6
10
7
10
8
10
2
10
1
0
1
2
3
4
5
6
7
8
MAXIMUM NUMBER
OF
SIGNIFICANT DIGITS
f
A
/ f
B
ICM7216B, ICM7216D
13
Test Circuit
Typical Applications
The lCM7216 has been designed for use in a wide range of Universal and Frequency counters. In many cases, prescalers will be required to reduce the input frequencies to under 10MHz. Because INPUT A and INPUT B are digital inputs, additional circuitry is often required for input buffering, amplification, hysteresis, and level shifting to obtain a good digital signal.
The lCM7216B can be used as a minimum component complete Universal Counter as shown in Figure This circuit can use input frequencies up to 10MHz at INPUT A and 2MHz at INPUT B. If the signal at INPUT A has a very low duty cycle it may be necessary to use a 74LS121 monostable multivibrator or similar circuit to stretch the input pulse width to be able to guarantee that it is at least 50ns in duration.
To measure frequencies up to 40MHz the circuit of Figure n be used. To obtain the correct measured value, it is necessary to divide the oscillator frequency by
four as well as the input frequency. In doing this the time between measurements is also lengthened to 800ms and the display multiplex rate is decreased to 125Hz.
If the input frequency is prescaled by ten, then the oscillator can remain at 10MHz or 1MHz, but the decimal point must be moved one digit to the right. Figu shows a frequency counter with a
÷
10
prescaler and an lCM7216A. Since there
is no external decimal point control with the lCM7216B, the decimal point may be controlled externally with additional drivers as shown in Figurnatively, if separate anodes are available for the decimal points, they can be wired up to the adjacent digit anodes. Note that there can be one zero to the left of the decimal point since the internal leading zero blanking cannot be changed. In Figure additional logic has been added to count the input directly in
period
mode for maximum accuracy. In Figuresa
INPUT A comes from QC of the prescaler rather than QD to obtain an input duty cycle of 40%.
FUNCTION
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
a b c d e f
g
DP
INPUT A
100pF
INPUT B
10K
DP
D1
D2
D3
D4
D8
D5
F
P
FR
TI.
U.C.
O.F.
RESET
LED
OVERFLOW
INDICATOR
D8
D8
D7
D6
D5
D4
D3
D2
D1
D1
D2
D3
D4
.01/1
.1/10
1/100
10/1K
10k
Ω
D1
D2
D3
D4
D5
D6
D7
D8
V
DD
ICM7216A
e
g
a
d
b
c
f
V
DD
10k
Ω
V
DD
10k
Ω
22M
Ω
10MHz
CRYSTAL
39pF
TYP
V
DD
DISPLAY
BLANK
DISPLAY
TEST
1MHz
EXT
TEST
OSC
39pF
D4
D8
D2
D1
D5
EXT
OSC
INPUT
TYPICAL CRYSTAL SPECS: F = 10MHz PARALLEL RESONANCE C
L
= 22pF
R
S
= <35
Ω
FUNCTION
RANGE
8
8
4
6
8
HOLD
GENERATOR
FUNCTION
GENERATOR
1N914s
FIGURE 14. TEST CIRCUIT (ICM7216A SHOWN, OTHERS SIMILAR)
ICM7216B, ICM7216D
14
FIGURE 15. 10MHz UNIVERSAL COUNTER
INPUT A
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
a
b
c
d
e
f
g
DP
10k
Ω
D1
D1
D2
D3
D4
D8
D5
F
P
F.R.
T.I.
U.C.
O.F.
LED
OVERFLOW
INDICATOR
D8
D8
D7
D6
D5
D4
D3
D2
D1
DP
g
e
a
D1
D2
D3
D4
d
b
c
f
V
DD
ICM7216B
D3
D2
D4
D5
D6
D7
D8
V
DD
V
DD
22M
Ω
10MHz
CRYSTAL
39pF
TYP
DISPLAY
BLANK
DISPLAY
TEST
EXT
OSC
D4
D8
D1
EXT OSC INPUT
FUNCTION
HOLD
INPUT B
ENABLE
100k
Ω
CONTROL
SWITCHES
SEC
CYCLES
D1
0.01
1.0
D2
0.1
10.0
D3
1.0
100.0
D4
10.0
1K
RANGE
10k
Ω
10k
Ω
SEGMENT DRIVERS
RESET
DIGIT
DRIVERS
COMMON CATHODE LED DISPLAY
0.1
F
6
8
8
8
8
39pF
V
DD
4
3
100pF
1N914s
ICM7216B, ICM7216D
15
FIGURE 16. 40MHz FREQUENCY COUNTER
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
a
b
c
d
e
f
g
DP
D1
OVERFLOW
INDICATOR
D8
D7
D6
D5
D4
D3
D2
D1
DP
g
e
a
d
b
c
f
ICM7216D
D3
D2
D4
D5
D6
D7
D8
V
DD
V
DD
22M
Ω
2.5MHz
CRYSTAL
39pF
DISPLAY
TEST
DISPLAY
OFF
EXT
OSC
D1
D4
D8
EXT
OSC
INPUT
HOLD
ENABLE
COMMON CATHODE LED DISPLAY
8
3
1N914s
LED
OVERFLOW
INDICATOR
D1
D2
D3
D4
RANGE
RESET
a b c d e f
g
DP
39pF
100k
Ω
INPUT A
1
/
2
74LS112
1
/
2
74LS112
4
8
8
10k
Ω
100pF
10k
Ω
3k
Ω
J
3
1
CL
K 2
C
15
V+
Q 5
Q 6
K 12
13
CL
J 11
C
14
P
10
P
4
Q 7
Q 9
0.1
F
V
DD
V
DD
D8
ICM7216B, ICM7216D
16
FIGURE 17. 100MHz MULTIFUNCTION COUNTER
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
a b c d e f
g
100pF
DP
D1
D2
D8
RESET
LED
OVERFLOW
INDICATOR
D8
D8
D7
D6
D5
D4
D3
D2
D1
D1
D2
D3
D4
10k
Ω
D1
D2
D3
D4
D5
D6
D7
D8
V
DD
ICM7216A
e
g
a
d
b
c
f
V
DD
10k
Ω
V
DD
10k
Ω
22M
Ω
10MHz
CRYSTAL
30pF
TYP
V
DD
DISPLAY
TEST
39pF
D7
RANGE
8
8
8
HOLD
V
DD
3k
Ω
D1
D2
D3
D4
DP
1k
Ω
DP
40
Ω
V
SS
1k
Ω
0.1
F
F
P
F.R.
10k
Ω
INPUT B
INPUT A
CK1 CK2
QA
QC
QA
QC
74LS90 OR
11C90
CK2
CK1
11C90
3k
Ω
V
DD
4
4
COMMON ANODE LED DISPLAY
2N2222
1N914
ICM7216B, ICM7216D
17
FIGURE 18. 100MHz FREQUENCY, 2MHz PERIOD COUNTER
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
a b c d e f
g
100pF
DP
D8
D8
D7
D6
D5
D4
D3
D2
D1
D1
D2
D3
D4
10k
Ω
D1
D2
D3
D4
D5
D6
D7
D8
V
DD
ICM7216A
e
g
a
d
b
c
f
V
DD
100k
Ω
V
DD
22M
Ω
10MHz
CRYSTAL
39pF
TYP
V
DD
39pF
RANGE
8
8
8
HOLD
D1
D2
D3
D4
DP
DP
40
Ω
V
SS
1k
Ω
4
4
COMMON ANODE LED DISPLAY
2N2222
CONT
CONT
RESET
0.1
F
10k
Ω
FUNCTION SWITCH
OPEN: FREQ. CLOSED: PERIOD
3k
Ω
3k
Ω
11C90
CK1
CK2 QA OC
74LS00
V
DD
10k
Ω
V
DD
V
DD
10k
Ω
10k
Ω
1k
Ω
V
SS
2N2222
1k
Ω
2N2222
10k
Ω
D3
1
2
13
CD4016
D1
4
3
D8
5
V
+
LED
OVERFLOW
INDICATOR
INPUT A
ICM7216B, ICM7216D
18
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporations quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
ICM7216B, ICM7216D
Dual-In-Line Plastic Packages (PDIP)
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M
-
1982.
3. Symbols are defined in the MO Series Symbol List in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS
-
3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and
are measured with the leads constrained to be perpendic-
ular to datum
.
7. e
B
and e
C
are measured at the lead tips with the leads unconstrained.
e
C
must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
e
A
-C-
C
L
E
e
A
C
e
B
e
C
-B-
E1
INDEX
1 2 3
N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25)
C
A
M
B S
E28.6
(JEDEC MS-011-AB ISSUE B)
28 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
-
0.250
-
6.35
4
A1
0.015
-
0.39
-
4
A2
0.125
0.195
3.18
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.030
0.070
0.77
1.77
8
C
0.008
0.015
0.204
0.381
-
D
1.380
1.565
35.1
39.7
5
D1
0.005
-
0.13
-
5
E
0.600
0.625
15.24
15.87
6
E1
0.485
0.580
12.32
14.73
5
e
0.100 BSC
2.54 BSC
-
e
A
0.600 BSC
15.24 BSC
6
e
B
-
0.700
-
17.78
7
L
0.115
0.200
2.93
5.08
4
N
28
28
9
Rev. 1 12/00
|