Caracteristicas tecnicas de LM1876

SNAS097C - MAY 1999 - REVISED APRIL 2013

LM1876 Overture™ Audio Power Amplifier Series

Dual 20W Audio Power Amplifier with Mute and Standby Modes

Check for Samples:

FEATURES

DESCRIPTION

The LM1876 is a stereo audio amplifier capable of

•

SPiKe Protection

delivering typically 20W per channel of continuous

•

Minimal Amount of External Components

average output power into a 4

Ω

or 8

Ω

load with less

Necessary

than 0.1% THD+N.

•

Quiet Fade-In/Out Mute Mode

Each amplifier has an independent smooth transition

•

Standby-Mode

fade-in/out mute and a power conserving standby
mode which can be controlled by external logic.

•

Isolated 15-Lead TO-220 Package (PFM)

•

Non-Isolated 15-lead TO-220 Package

The performance of the LM1876, utilizing its Self
Peak Instantaneous Temperature ( °Ke) ( SPiKe™)

•

Wide Supply Range 20V - 64V

protection circuitry, places it in a class above discrete
and hybrid amplifiers by providing an inherently,

APPLICATIONS

dynamically protected Safe Operating Area (SOA).

•

High-End Stereo TVs

SPiKe

protection

means

that

these

parts

are

safeguarded

the

output

against

overvoltage,

•

Component Stereo

undervoltage, overloads, including thermal runaway

•

Compact Stereo

and instantaneous temperature peaks.

KEY SPECIFICATIONS

•

THD+N at 1kHz at 2 x 15W continuous
averageoutput power into 4

Ω

or 8

Ω

: 0.1%

(max)

•

THD+N at 1kHz at continuous average output
power of 2 x 20W into 8

Ω

: 0.009% (typ)

•

Standby current: 4.2mA (typ)

Connection Diagram

Figure 1. Plastic Package- Top View

Isolated Package (PFM)

See Package Number NDB0015B

Non-Isolated Package

See Package Number NDL0015A

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Overture, SPiKe are trademarks of dcl_owner.

All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

SNAS097C - MAY 1999 - REVISED APRIL 2013

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2) (3)

Supply Voltage |V

| + |V

| (No Input)

64V

Supply Voltage |V

| + |V

| (with Input)

64V

Common Mode Input Voltage

or V

) and

| + |V

≤

54V

Differential Input Voltage

54V

Output Current

Internally Limited

Power Dissipation

(4)

62.5W

ESD Susceptability

(5)

2000V

Junction Temperature

(6)

150 °C

Thermal Resistance

Isolated NDB-Package

2 °C/W

Non-Isolated NDL-Package

1 °C/W

Soldering Information

NDB Package (10 sec.)

260 °C

Storage Temperature

40 °C to +150 °C

(1)

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which specify performance limits. This assumes that the device is within the Operating
Ratings. Specifications are not ensure for parameters where no limit is given, however, the typical value is a good indication of device
performance.

(2)

All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.

(3)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.

(4)

For operating at case temperatures above 25 °C, the device must be derated based on a 150 °C maximum junction temperature and a
thermal resistance of

= 2 °C/W (junction to case) for the NDB package and

= 1 °C/W for the NDL package. Refer to

(5)

Human body model, 100 pF discharged through a 1.5 k

Ω

resistor.

(6)

The operating junction temperature maximum is 150 °C, however, the instantaneous Safe Operating Area temperature is 250 °C.

Operating Ratings

(1) (2)

Temperature Range

MIN

≤

MAX

20 °C

≤

+85 °C

Supply Voltage |V

| + |V

(3)

20V to 64V

(1)

All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.

(2)

(3)

Operation is specified up to 64V, however, distortion may be introduced from SPiKe Protection Circuitry if proper thermal considerations
are not taken into account. Refer to

for a complete explanation.

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Electrical Characteristics

(1) (2)

The following specifications apply for V

= +22V, V

22V with R

= 8

Ω

unless otherwise specified. Limits apply for T

25 °C.

Symbol

Parameter

Conditions

LM1876

Units

(Limits)

Typical

Limit

(4)

)

| +

Power Supply Voltage

(5)

GND

≥

V (min)

V (max)

(6)

Output Power

THD + N = 0.1% (max),

(Continuous Average)

f = 1 kHz

| = |V

| = 22V, R

= 8

Ω

W/ch (min)

| = |V

| = 20V, R

= 4

Ω

(7)

W/ch (min)

THD + N

Total Harmonic Distortion

15 W/ch, R

= 8

Ω

0.08

Plus Noise

15 W/ch, R

= 4

Ω

, |V

| = |V

| = 20V

0.1

20 Hz

≤

20 kHz, A

= 26 dB

talk

Channel Separation

f = 1 kHz, V

= 10.9 Vrms

(6)

Slew Rate

= 1.414 Vrms, t

rise

= 2 ns

s (min)

total

(8)

Total Quiescent Power

Both Amplifiers V

= 0V,

Supply Current

= 0V, I

= 0 mA

Standby: Off

mA (max)

Standby: On

4.2

mA (max)

(8)

Input Offset Voltage

= 0V, I

= 0 mA

2.0

mV (max)

Input Bias Current

= 0V, I

= 0 mA

0.2

0.5

A (max)

Input Offset Current

= 0V, I

= 0 mA

0.002

0.2

A (max)

Output Current Limit

| = |V

| = 10V, t

= 10 ms,

3.5

2.9

Apk (min)

= 0V

(8)

Output Dropout Voltage

(9)

-V

|, V

= 20V, I

= +100 mA

1.8

2.3

V (max)

-V

|, V

20V, I

100 mA

2.5

3.2

V (max)

PSRR

(8)

Power Supply Rejection Ratio

= 25V to 10V, V

25V,

115

dB (min)

= 0V, I

= 0 mA

= 25V, V

25V to

10V

110

dB (min)

= 0V, I

= 0 mA

CMRR

(8)

Common Mode Rejection Ratio

= 35V to 10V, V

10V to

35V,

110

dB (min)

= 10V to

10V, I

= 0 mA

VOL

(8)

Open Loop Voltage Gain

= 2 k

Ω

= 20 V

110

dB (min)

GBWP

Gain Bandwidth Product

= 100 kHz, V

= 50 mVrms

7.5

MHz (min)

(1)

All voltages are measured with respect to the GND pins (5, 10), unless otherwise specified.

(2)

(3)

Typicals are measured at 25 °C and represent the parametric norm.

(4)

Limits are ensure that all parts are tested in production to meet the stated values.

(5)

must have at least

9V at its pin with reference to ground in order for the under-voltage protection circuitry to be disabled. In

addition, the voltage differential between V

and V

must be greater than 14V.

(6)

AC Electrical Test; Refer to

(7)

For a 4

Ω

load, and with ±20V supplies, the LM1876 can deliver typically 22W of continuous average output power with less than 0.1%

(THD + N). With supplies above ±20V, the LM1876 cannot deliver more than 22W into a 4

Ω

due to current limiting of the output

transistors. Thus, increasing the power supply above ±20V will only increase the internal power dissipation, not the possible output
power. Increased power dissipation will require a larger heat sink as explained in

(8)

DC Electrical Test; Refer to

(9)

The output dropout voltage, V

, is the supply voltage minus the clipping voltage. Refer to

, and

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Electrical Characteristics

(continued)

The following specifications apply for V

= +22V, V

22V with R

= 8

Ω

unless otherwise specified. Limits apply for T

25 °C.

Symbol

Parameter

Conditions

LM1876

Units

(Limits)

Typical

Limit

(4)

)

(6)

Input Noise

IHF—A Weighting Filter

2.0

V (max)

= 600

Ω

(Input Referred)

SNR

Signal-to-Noise Ratio

= 1W, A—Weighted,

Measured at 1 kHz, R

= 25

Ω

= 15W, A—Weighted

108

Measured at 1 kHz, R

= 25

Ω

Mute Attenuation

Pin 6,11 at 2.5V

115

dB (min)

Standby Pin

Standby Low Input Voltage

Not in Standby Mode

0.8

V (max)

Standby High Input Voltage

In Standby Mode

2.0

2.5

V (min)

Mute pin

Mute Low Input Voltage

Outputs Not Muted

0.8

V (max)

Mute High Input Voltage

Outputs Muted

2.0

2.5

V (min)

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SNAS097C - MAY 1999 - REVISED APRIL 2013

(excluding active protection circuitry)

External Components Description

Components

Functional Description

Prevents currents from entering the amplifier's non-inverting input which may be passed through to the load upon
power down of the system due to the low input impedance of the circuitry when the undervoltage circuitry is off.
This phenomenon occurs when the supply voltages are below 1.5V.

Inverting input resistance to provide AC gain in conjunction with R

Feedback resistance to provide AC gain in conjunction with R

(1)

Feedback capacitor which ensures unity gain at DC. Also creates a highpass filter with R

at f

= 1/(2

Ï€

Provides power supply filtering and bypassing. Refer to

for proper placement and selection

of bypass capacitors.

(1)

Acts as a volume control by setting the input voltage level.

(1)

Sets the amplifier's input terminals DC bias point when C

is present in the circuit. Also works with C

to create a

highpass filter at f

= 1/(2

Ï€

). Refer to

(1)

Input capacitor which blocks the input signal's DC offsets from being passed onto the amplifier's inputs.

(1)

Works with C

to stabilize the output stage by creating a pole that reduces high frequency instabilities.

(1)

Works with R

to stabilize the output stage by creating a pole that reduces high frequency instabilities. The pole is

set at f

= 1/(2

Ï€

). Refer to

(1)

Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce the Q of
the series resonant circuit. Also provides a low impedance at low frequencies to short out R and pass audio signals

(1)

to the load. Refer to

Provides DC voltage biasing for the transistor Q1 in single supply operation.

Provides bias filtering for single supply operation.

INP

(1)

Limits the voltage difference between the amplifier's inputs for single supply operation. Refer to

for a more detailed explanation of the function of R

INP

Provides input bias current for single supply operation. Refer to

for a more detailed

explanation of the function of R

Establishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the half-
supply point along with C

(1)

Optional components dependent upon specific design requirements.

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APPLICATION INFORMATION

MUTE MODE

By placing a logic-high voltage on the mute pins, the signal going into the amplifiers will be muted. If the mute
pins are left floating or connected to a logic-low voltage, the amplifiers will be in a non-muted state. There are
two mute pins, one for each amplifier, so that one channel can be muted without muting the other if the
application requires such a configuration. Refer to

for

and

STANDBY MODE

The standby mode of the LM1876 allows the user to drastically reduce power consumption when the amplifiers
are idle. By placing a logic-high voltage on the standby pins, the amplifiers will go into Standby Mode. In this
mode, the current drawn from the V

supply is typically less than 10

A total for both amplifiers. The current

drawn from the V

supply is typically 4.2 mA. Clearly, there is a significant reduction in idle power consumption

when using the standby mode. There are two Standby pins, so that one channel can be put in standby mode
without putting the other amplifier in standby if the application requires such flexibility. Refer to

for

and

UNDER-VOLTAGE PROTECTION

Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding
capacitors to come up close to their full values before turning on the LM1876 such that no DC output spikes
occur. Upon turn-off, the output of the LM1876 is brought to ground before the power supplies such that no
transients occur at power-down.

OVER-VOLTAGE PROTECTION

The LM1876 contains over-voltage protection circuitry that limits the output current to approximately 3.5 Apk
while also providing voltage clamping, though not through internal clamping diodes. The clamping effect is quite
the same, however, the output transistors are designed to work alternately by sinking large current spikes.

SPiKe PROTECTION

The LM1876 is protected from instantaneous peak-temperature stressing of the power transistor array. The

shows the area of device operation where SPiKe Protection

Circuitry is not enabled. The waveform to the right of the SOA graph exemplifies how the dynamic protection will
cause waveform distortion when enabled.

THERMAL PROTECTION

The LM1876 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device.
When the temperature on the die reaches 165 °C, the LM1876 shuts down. It starts operating again when the die
temperature drops to about 155 °C, but if the temperature again begins to rise, shutdown will occur again at
165 °C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is
temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal
shutdown temperature limits of 165 °C and 155 °C. This greatly reduces the stress imposed on the IC by thermal
cycling, which in turn improves its reliability under sustained fault conditions.

Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen such
that thermal shutdown will not be reached during normal operation. Using the best heat sink possible within the
cost and space constraints of the system will improve the long-term reliability of any power semiconductor
device, as discussed in

DETERMlNlNG MAXIMUM POWER DISSIPATION

Power dissipation within the integrated circuit package is a very important parameter requiring a thorough
understanding if optimum power output is to be obtained. An incorrect maximum power dissipation calculation
may result in inadequate heat sinking causing thermal shutdown and thus limiting the output power.

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SNAS097C - MAY 1999 - REVISED APRIL 2013

exemplifies the theoretical maximum power dissipation point of each amplifier where V

is the total

supply voltage.

DMAX

= V

2/2

Ï€

(1)

Thus by knowing the total supply voltage and rated output load, the maximum power dissipation point can be
calculated. The package dissipation is twice the number which results from

since there are two

amplifiers in each LM1876. Refer to

and

which show

the actual full range of power dissipation not just the maximum theoretical point that results from

DETERMINING THE CORRECT HEAT SINK

The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level
such that the thermal protection circuitry does not operate under normal circumstances.

The thermal resistance from the die (junction) to the outside air (ambient) is a combination of three thermal
resistances,

, and

. In addition, the thermal resistance,

(junction to case), of the LM1876TF is

2 °C/W and the LM1876T is 1 °C/W. Using Thermalloy Thermacote thermal compound, the thermal resistance,

(case to sink), is about 0.2 °C/W. Since convection heat flow (power dissipation) is analogous to current flow,

thermal resistance is analogous to electrical resistance, and temperature drops are analogous to voltage drops,
the power dissipation out of the LM1876 is equal to the following:

DMAX

= (T

JMAX

AMB

where

•

JMAX

= 150 °C

•

AMB

is the system ambient temperature

•

(2)

Once the maximum package power dissipation has been calculated using

, the maximum thermal

resistance,

, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using

which is derived by solving for

= [(T

JMAX

AMB

)

DMAX

(

)]/P

DMAX

(3)

Again it must be noted that the value of

is dependent upon the system designer's amplifier requirements. If

the ambient temperature that the audio amplifier is to be working under is higher than 25 °C, then the thermal
resistance for the heat sink, given all other things are equal, will need to be smaller.

SUPPLY BYPASSING

The LM1876 has excellent power supply rejection and does not require a regulated supply. However, to improve
system performance as well as eliminate possible oscillations, the LM1876 should have its supply leads
bypassed with low-inductance capacitors having short leads that are located close to the package terminals.
Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as †œmotorboating† or
by high frequency instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large
tantalum or electrolytic capacitor (10

F or larger) which is used to absorb low frequency variations and a small

ceramic capacitor (0.1

F) to prevent any high frequency feedback through the power supply lines.

If adequate bypassing is not provided, the current in the supply leads which is a rectified component of the load
current may be fed back into internal circuitry. This signal causes distortion at high frequencies requiring that the
supplies be bypassed at the package terminals with an electrolytic capacitor of 470

F or more.

BRIDGED AMPLIFIER APPLICATION

The LM1876 has two operational amplifiers internally, allowing for a few different amplifier configurations. One of
these configurations is referred to as †œbridged mode† and involves driving the load differentially through the
LM1876's outputs. This configuration is shown in

. Bridged mode operation is different from the classical

single-ended amplifier configuration where one side of its load is connected to ground.

A bridge amplifier design has a distinct advantage over the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified supply voltage. Consequently, theoretically four times
the output power is possible as compared to a single-ended amplifier under the same conditions. This increase in
attainable output power assumes that the amplifier is not current limited or clipped.

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A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal
power dissipation. For each operational amplifier in a bridge configuration, the internal power dissipation will
increase by a factor of two over the single ended dissipation. Thus, for an audio power amplifier such as the
LM1876, which has two operational amplifiers in one package, the package dissipation will increase by a factor
of four. To calculate the LM1876's maximum power dissipation point for a bridged load, multiply

by a

factor of four.

This value of P

DMAX

can be used to calculate the correct size heat sink for a bridged amplifier application. Since

the internal dissipation for a given power supply and load is increased by using bridged-mode, the heatsink's

will have to decrease accordingly as shown by

. Refer to

for a more detailed discussion of proper heat sinking for a given application.

SINGLE-SUPPLY AMPLIFIER APPLICATION

The typical application of the LM1876 is a split supply amplifier. But as shown in

, the LM1876 can also

be used in a single power supply configuration. This involves using some external components to create a half-
supply bias which is used as the reference for the inputs and outputs. Thus, the signal will swing around half-
supply much like it swings around ground in a split-supply application. Along with proper circuit biasing, a few
other considerations must be accounted for to take advantage of all of the LM1876 functions.

The LM1876 possesses a mute and standby function with internal logic gates that are half-supply referenced.
Thus, to enable either the Mute or Standby function, the voltage at these pins must be a minimum of 2.5V above
half-supply. In single-supply systems, devices such as microprocessors and simple logic circuits used to control
the mute and standby functions, are usually referenced to ground, not half-supply. Thus, to use these devices to
control the logic circuitry of the LM1876, a †œlevel shifter,† like the one shown in

must be employed. A

level shifter is not needed in a split-supply configuration since ground is also half-supply.

Figure 45. Level Shift Circuit

When the voltage at the Logic Input node is 0V, the 2N3904 is †œoff† and thus resistor R

pulls up mute or standby

input to the supply. This enables the mute or standby function. When the Logic Input is 5V, the 2N3904 is †œon†
and consequently, the voltage at the collector is essentially 0V. This will disable the mute or standby function,
and thus the amplifier will be in its normal mode of operation. R

shift

, along with C

shift

, creates an RC time constant

that reduces transients when the mute or standby functions are enabled or disabled. Additionally, R

shift

limits the

current supplied by the internal logic gates of the LM1876 which insures device reliability. Refer to

and

for a more detailed description of these functions.

CLICKS AND POPS

In the typical application of the LM1876 as a split-supply audio power amplifier, the IC exhibits excellent †œclick†
and †œpop† performance when utilizing the mute and standby modes. In addition, the device employs Under-
Voltage Protection, which eliminates unwanted power-up and power-down transients. The basis for these
functions are a stable and constant half-supply potential. In a split-supply application, ground is the stable half-
supply potential. But in a single-supply application, the half-supply needs to charge up just like the supply rail,
V

. This makes the task of attaining a clickless and popless turn-on more challenging. Any uneven charging of

the amplifier inputs will result in output clicks and pops due to the differential input topology of the LM1876.

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To achieve a transient free power-up and power-down, the voltage seen at the input terminals should be ideally
the same. Such a signal will be common-mode in nature, and will be rejected by the LM1876. In

the

resistor R

INP

serves to keep the inputs at the same potential by limiting the voltage difference possible between

the two nodes. This should significantly reduce any type of turn-on pop, due to an uneven charging of the
amplifier inputs. This charging is based on a specific application loading and thus, the system designer may need
to adjust these values for optimal performance.

As shown in

the resistors labeled R

help bias up the LM1876 off the half-supply node at the emitter of

the 2N3904. But due to the input and output coupling capacitors in the circuit, along with the negative feedback,
there are two different values of R

, namely 10 k

Ω

and 200 k

Ω

. These resistors bring up the inputs at the same

rate resulting in a popless turn-on. Adjusting these resistors values slightly may reduce pops resulting from
power supplies that ramp extremely quick or exhibit overshoot during system turn-on.

AUDIO POWER AMPLlFIER DESIGN

Design a 15W/8

Ω

Audio Amplifier

Given:

Power Output

15 Wrms

Load Impedance

Ω

Input Level

1 Vrms(max)

Input Impedance

47 k

Ω

Bandwidth

20 Hz

20 kHz ±0.25 dB

A designer must first determine the power supply requirements in terms of both voltage and current needed to
obtain the specified output power. V

OPEAK

can be determined from

and I

OPEAK

from

(4)

(5)

To determine the maximum supply voltage the following conditions must be considered. Add the dropout voltage
to the peak output swing V

OPEAK

, to get the supply rail at a current of I

OPEAK

. The regulation of the supply

determines the unloaded voltage which is usually about 15% higher. The supply voltage will also rise 10% during
high line conditions. Therefore the maximum supply voltage is obtained from the following equation.

Max supplies

•‰ˆ

± (V

OPEAK

+ V

) (1 + regulation) (1.1)

(6)

For 15W of output power into an 8

Ω

load, the required V

OPEAK

is 15.49V. A minimum supply rail of 20.5V results

from adding V

OPEAK

and V

. With regulation, the maximum supplies are ±26V and the required I

OPEAK

is 1.94A

from

It should be noted that for a dual 15W amplifier into an 8

Ω

load the I

OPEAK

drawn from the

supplies is twice 1.94 Apk or 3.88 Apk. At this point it is a good idea to check the Power Output vs Supply
Voltage to ensure that the required output power is obtainable from the device while maintaining low THD+N. In
addition, the designer should verify that with the required power supply voltage and load impedance, that the
required heatsink value

is feasible given system cost and size constraints. Once the heatsink issues have

been addressed, the required gain can be determined from

(7)

From

the minimum A

is:

≥

11.

By selecting a gain of 21, and with a feedback resistor, R

= 20 k

Ω

, the value of R

follows from

= R

(8)

Thus with R

= 1 k

Ω

a non-inverting gain of 21 will result. Since the desired input impedance was 47 k

Ω

, a value

of 47 k

Ω

was selected for R

. The final design step is to address the bandwidth requirements which must be

stated as a pair of

3 dB frequency points. Five times away from a

3 dB point is 0.17 dB down from passband

response which is better than the required ±0.25 dB specified. This fact results in a low and high frequency pole
of 4 Hz and 100 kHz respectively. As stated in

, R

in conjunction with C

create

a high-pass filter.

≥

1/(2

Ï€

* 1 k

Ω

* 4 Hz) = 39.8

use 39

(9)

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PACKAGE OPTION ADDENDUM

www.ti.com

6-May-2016

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device

Status

(1)

Package Type Package

Drawing

Pins Package

Qty

Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp ( °C)

Device Marking

(4/5)

Samples

LM1876T

LIFEBUY

TO-220

NDL

TBD

Call TI

-20 to 85

LM1876T

LM1876T/NOPB

LIFEBUY

TO-220

NDL

Green (RoHS

& no Sb/Br)

CU SN

Level-1-NA-UNLIM

-20 to 85

LM1876T

LM1876TF

LIFEBUY

TO-220

NDB

TBD

Call TI

-20 to 85

LM1876TF

LM1876TF/NOPB

NRND

TO-220

NDB

Pb-Free (RoHS

Exempt)

CU SN

Level-1-NA-UNLIM

-20 to 85

LM1876TF

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

for the latest availability

information and additional product content details.
TBD:  The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based  die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br)  and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

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