TL081
TL081 Wide Bandwidth JFET Input Operational Amplifier
Literature Number: SNOSBW6A
TL/H/8358
TL081
Wide
Bandwidth
JFET
Input
Operational
Amplifier
December 1995
TL081 Wide Bandwidth JFET Input Operational Amplifier
General Description
The TL081 is a low cost high speed JFET input operational amplifier with an internally trimmed input offset voltage (BI-FET II
TM
technology). The device requires a low supply
current and yet maintains a large gain bandwidth product and a fast slew rate. In addition, well matched high voltage JFET input devices provide very low input bias and offset currents. The TL081 is pin compatible with the standard LM741 and uses the same offset voltage adjustment circuit- ry. This feature allows designers to immediately upgrade the overall performance of existing LM741 designs.
The TL081 may be used in applications such as high speed integrators, fast D/A converters, sample-and-hold circuits and many other circuits requiring low input offset voltage, low input bias current, high input impedance, high slew rate and wide bandwidth. The devices has low noise and offset voltage drift, but for applications where these requirements
are critical, the LF356 is recommended. If maximum supply current is important, however, the TL081C is the better choice.
Features
Y
Internally trimmed offset voltage
15 mV
Y
Low input bias current
50 pA
Y
Low input noise voltage
25 nV/
0
Hz
Y
Low input noise current
0.01 pA/
0
Hz
Y
Wide gain bandwidth
4 MHz
Y
High slew rate
13 V/ms
Y
Low supply current
1.8 mA
Y
High input impedance
10
12
X
Y
Low total harmonic distortion A
V
e
10,
k
0.02%
R
L
e
10k, V
O
e
20 Vp-p,
BW
e
20 Hz
b
20 kHz
Y
Low 1/f noise corner
50 Hz
Y
Fast settling time to 0.01%
2 ms
Typical Connection
TL/H/8358 - 1
Connection Diagram
Simplified Schematic
TL/H/8358 - 2
Dual-In-Line Package
TL/H/8358 - 4
Order Number TL081CP
See NS Package Number N08E
BI-FET II
TM
is a trademark of National Semiconductor Corp.
C1995 National Semiconductor Corporation
RRD-B30M125/Printed in U. S. A.
Obsolete
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage
g
18V
Power Dissipation (Notes 1 and 6)
670 mW
Operating Temperature Range
0
§
C to
a
70
§
C
T
j(MAX)
115
§
C
Differential Input Voltage
g
30V
Input Voltage Range (Note 2)
g
15V
Output Short Circuit Duration
Continuous
Storage Temperature Range
b
65
§
C to
a
150
§
C
Lead Temp. (Soldering, 10 seconds)
260
§
C
i
jA
120
§
C/W
ESD rating to be determined.
DC Electrical Characteristics
(Note 3)
Symbol
Parameter
Conditions
TL081C
Units
Min
Typ
Max
V
OS
Input Offset Voltage
R
S
e
10 kX, T
A
e
25
§
C
5
15
mV
Over Temperature
20
mV
D
V
OS
/DT
Average TC of Input Offset
R
S
e
10 kX
10
m
V/
§
C
Voltage
I
OS
Input Offset Current
T
j
e
25
§
C, (Notes 3, 4)
25
100
pA
T
j
s
70
§
C
4
nA
I
B
Input Bias Current
T
j
e
25
§
C, (Notes 3, 4)
50
200
pA
T
j
s
70
§
C
8
nA
R
IN
Input Resistance
T
j
e
25
§
C
10
12
X
A
VOL
Large Signal Voltage Gain
V
S
e
g
15V, T
A
e
25
§
C
25
100
V/mV
V
O
e
g
10V, R
L
e
2 kX
Over Temperature
15
V/mV
V
O
Output Voltage Swing
V
S
e
g
15V, R
L
e
10 kX
g
12
g
13.5
V
V
CM
Input Common-Mode Voltage
V
S
e
g
15V
g
11
a
15
V
Range
b
12
V
CMRR
Common-Mode Rejection Ratio
R
S
s
10 kX
70
100
dB
PSRR
Supply Voltage Rejection Ratio
(Note 5)
70
100
dB
I
S
Supply Current
1.8
2.8
mA
AC Electrical Characteristics
(Note 3)
Symbol
Parameter
Conditions
TL081C
Units
Min
Typ
Max
SR
Slew Rate
V
S
e
g
15V, T
A
e
25
§
C
13
V/ms
GBW
Gain Bandwidth Product
V
S
e
g
15V, T
A
e
25
§
C
4
MHz
e
n
Equivalent Input Noise Voltage
T
A
e
25
§
C, R
S
e
100X,
25
nV/
0
Hz
f
e
1000 Hz
i
n
Equivalent Input Noise Current
T
j
e
25
§
C, f
e
1000 Hz
0.01
pA/
0
Hz
Note 1:
For operating at elevated temperature, the device must be derated based on a thermal resistance of 120
§
C/W junction to ambient for N package.
Note 2:
Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 3:
These specifications apply for V
S
e g
15V and 0
§
C
s
T
A
s a
70
§
C. V
OS
, I
B
and I
OS
are measured at V
CM
e
0.
Note 4:
The input bias currents are junction leakage currents which approximately double for every 10
§
C increase in the junction temperature, T
j
. Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, P
D
. T
j
e
T
A
a
i
jA
P
D
where i
jA
is the thermal resistance from junction to ambient. Use of a heat sink is
recommended if input bias current is to be kept to a minimum.
Note 5:
Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from
V
S
e g
5V to
g
15V.
Note 6:
Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate
outside guaranteed limits.
2
Obsolete
Typical Performance Characteristics
Input Bias Current
Input Bias Current
Supply Current
TL/H/8358 - 5
Positive Common-Mode Input Voltage Limit
Negative Common-Mode Input Voltage Limit
Positive Current Limit
Negative Current Limit
Voltage Swing
Output Voltage Swing
Gain Bandwidth
Bode Plot
Slew Rate
3
Obsolete
Typical Performance Characteristics
(Continued)
Distortion vs Frequency
Undistorted Output Voltage Swing
Open Loop Frequency Response
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Equivalent Input Noise Voltage
Open Loop Voltage Gain (V/V)
Output Impedance
Inverter Settling Time
TL/H/8358 - 6
4
Obsolete
Pulse Response
Small Signal Inverting
TL/H/8358 - 7
Small Signal Non-Inverting
TL/H/8358 - 13
Large Signal Inverting
TL/H/8358 - 14
Large Signal Non-Inverting
TL/H/8358 - 15
Current Limit (R
L
e
100X)
TL/H/8358 - 16
Application Hints
The TL081 is an op amp with an internally trimmed input offset voltage and JFET input devices (BI-FET II). These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs. Therefore, large differential input voltages can easily be accommodated without a large increase in input current. The maximum differential input voltage is independent of the supply voltages. However, neither of the input voltages should be allowed to exceed the negative supply as this
will cause large currents to flow which can result in a de- stroyed unit.
Exceeding the negative common-mode limit on either input will force the output to a high state, potentially causing a reversal of phase to the output.
Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state. In neither case does a latch occur since raising the input back within the
5
Obsolete
Application Hints
(Continued)
common-mode range again puts the input stage and thus the amplifier in a normal operating mode.
Exceeding the positive common-mode limit on a single input will not change the phase of the output; however, if both inputs exceed the limit, the output of the amplifier will be forced to a high state.
The amplifier will operate with a common-mode input volt- age equal to the positive supply; however, the gain band- width and slew rate may be decreased in this condition. When the negative common-mode voltage swings to within 3V of the negative supply, an increase in input offset voltage may occur.
The TL081 is biased by a zener reference which allows nor- mal circuit operation on
g
4V power supplies. Supply volt-
ages less than these may result in lower gain bandwidth and slew rate.
The TL081 will drive a 2 kX load resistance to
g
10V over
the full temperature range of 0
§
C to
a
70
§
C. If the amplifier
is forced to drive heavier load currents, however, an in- crease in input offset voltage may occur on the negative voltage swing and finally reach an active current limit on both positive and negative swings.
Precautions should be taken to ensure that the power sup- ply for the integrated circuit never becomes reversed in po- larity or that the unit is not inadvertently installed backwards in a socket as an unlimited current surge through the
resulting forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit.
Because these amplifiers are JFET rather than MOSFET input op amps they do not require special handling.
As with most amplifiers, care should be taken with lead dress, component placement and supply decoupling in or- der to ensure stability. For example, resistors from the out- put to an input should be placed with the body close to the input to minimize †˜†˜pick-up’’ and maximize the frequency of the feedback pole by minimizing the capacitance from the input to ground.
A feedback pole is created when the feedback around any amplifier is resistive. The parallel resistance and capaci- tance from the input of the device (usually the inverting in- put) to AC ground set the frequency of the pole. In many instances the frequency of this pole is much greater than the expected 3 dB frequency of the closed loop gain and consequently there is negligible effect on stability margin. However, if the feedback pole is less than approximately 6 times the expected 3 dB frequency a lead capacitor should be placed from the output to the input of the op amp. The value of the added capacitor should be such that the RC time constant of this capacitor and the resistance it parallels is greater than or equal to the original feedback pole time constant.
Detailed Schematic
TL/H/8358 - 8
6
Obsolete
Typical Applications
Supply Current Indicator/Limiter
TL/H/8358 - 9
#
V
OUT
switches high when R
S
I
S
l
V
D
Hi-Z
IN
Inverting Amplifier
TL/H/8358 - 10
Parasitic input capacitance C1 j (3 pF for TL081 plus any additional layout capacitance) interacts with feedback elements and creates un- desirable high frequency pole. To compensate, add C2 such that: R2C2 j R1C1.
Ultra-Low (or High) Duty Cycle Pulse
Generator
TL/H/8358 - 11
#
t
OUTPUT HIGH
&
R1C fin
4.8
b
2V
S
4.8
b
V
S
#
t
OUTPUT LOW
&
R2C fin
2V
S
b
7.8
V
S
b
7.8
where V
S
e
V
a
a
l
V
b
l
*low leakage capacitor
Long Time Integrator
TL/H/8358 - 12
* Low leakage capacitor
#
50k pot used for less sensitive V
OS
adjust
7
Obsolete
TL081
Wide
Bandwidth
JFET
Input
Operational
Amplifier
Physical Dimensions
inches (millimeters)
Molded Dual-In-Line Package (N)
Order Number TL081CP
NS Package Number N08E
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Obsolete
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