Caracteristicas tecnicas de MAX14748

General Description

The MAX14748 USB battery charger integrates a charger

detector, boost/buck converter, and Li+ battery charger

with smart power selector to provide fast and safe charging

of 2s Li+ battery packs.
The MAX14748 provides support for devices functioning

as a UFP/DRP per the USB Type-C 1.1 standard, while

also providing detection of legacy USB Battery Charging

Specification, Revision 1.2 (BC1.2) compliant chargers in

addition to other nonstandard chargers. The programmable

Automatic Input Current Limiting (AICL) feature ensures that

maximum safe current is drawn from the charging adapter.
The Li+ charger includes an automatic Smart Power

Selector™ to simultaneously charge the battery and

provide power to the system load. The Smart Power

Selector function will supplement the system power with

the battery if power from the charging adapter is insufficient.

The Li+ charger features JEITA thermal monitoring and

charger voltage/current reduction or charger disable.
The MAX14748 is available in a 54-bump, 0.4mm pitch,

3.97mm x 2.77mm x 0.64mm wafer-level package (WLP)

and operates over the -40 °C to +85 °C extended temperature

range.

Applications

•— Digital Imaging (DSC, DVC)

•— Wireless Speakers

•— Handheld Barcode Readers

Benefits and Features

•— Minimize Power Management Footprint Through High

Integration

• 13mΩ (typ) Integrated Battery To System Switch

• Thermal Current Limiting

• DC-DC Converter with Boost and Reverse Buck

• High Efficiency

- 92% in Boost Mode at 1A Output Current and

7.4V Battery Voltage

- 94% in Reverse Buck Mode at 500mA Output

• Internal USB Switch for USB D+/D- Data Lines

•— Easy-to-Implement Li+ Battery Charging

• Charges 2s Li-Ion Batteries from Legacy 5V USB

Adapters

- 15W Input Power with 3A Type-C Adapter

- 7.5W Input Power with DCP Adapter

- 1A System/Charge Current From DCP Adapter

- 2A System/Charge Current From 3A Type-C Adapter

• USB Type-C Specification, Rev 1.1 Support

• UFP/DRP Operation

• V

CONN

and Super-Speed Multiplexer Logic Controls

• Non-Standard DCP Detection

• USB Battery Charging Specification, Rev 1.2 Compliant

•— Automatic Input Current Limit (AICL) Power

Management

•— Support Weak/Dead Batteries Detection

• Smart Power Selector

• Thermistor Monitor

•— Various Protection Features

• 28V Integrated Overvoltage Protection

• JEITA Charge Protection

• ±15kV ESD Protection on USB Adapter Pins

19-100081; Rev 0; 6/17

Smart Power Selector is a trademark of Maxim Integrated

Products, Inc.

MAX14748

USB Type-C Charger

Voltages Referenced to GND

CHGIN ..................................................................-0.3V to +30V

BST .......................................................................-0.3V to +16V

SYS to BAT ..........................................................-0.3V to +12V

BAT, SYS ..............................................................-0.3V to +12V

BYP to CHGIN ......................................................-30V to +0.3V

BYP, THM, INT, SYSOK, FLTIN, FSUS,

LED, SDA, SCL ....................................................-0.3V to 6V

COMP, SET .......................................... -0.3V to V

CCINT

+ 0.3V

CC1, CC2, TDN, TDP, CDN, CDP, V

CONN

............-0.3V to +6V

CC1, CC2, in fault mode through a 10k resistor ..-0.3V to +20V

CDIR .......................................................................-0.3V to +6V

VTPU (VTPU-TPU switch open) .......... -0.3V to V

CCINT

+ 0.3V

TPU (VTPU-TPU switch open) .........-0.3V to 6 or VTPU + 0.3V

VTPU, TPU Maximum Current

(VTPU-TPU switch closed) ...................... -100mA to +100mA

BVCEN ..................................................-0.3V to V

CCINT

+ 0.3V

SFOUT, V

CCINT

, BREG ....... -0.3V to min ((V

CHGIN

+ 0.3), 6)V

LX .............................................................-0.3V to V

SYS

+ 0.3V

NVP ......................................................................-0.3V to +30V

AGND, DGND, PGND, GND ...............................-0.3V to +0.3V

Continuous Current into

CHGIN, SYS ...................................................................+6.4A

BAT .................................................................................+4.8A

Any Other Terminal .....................................................+100mA

Continuous Power Dissipation

(multilayer board at +70 °C): 9 x 6 Array 54-Bump,

3.97mm x 2.77mm 0.4mm Pitch WLP

(derate 24.46mW/ °C) .................................................1.957W

Operating Temperature Range .......................... -40 °C to +85 °C

Junction Temperature ................................................... +150 °C

Storage Temperature Range ........................... -65 °C to +150 °C

Lead Temperature (soldering, 10s) .............................. +300 °C

Soldering Temperature (reflow) .................................... +260 °C

WLP

Junction-to-Ambient Thermal Resistance (Θ

) .....40.88 °C/W

(Note 1)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

Electrical Characteristics

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SUPPLY CURRENT

BAT Supply Current

BAT

CHGIN

= 0V or Floating, Type-C

detection active

140

µA

Low Power mode

µA

CHGIN Supply Current

CHG

CHGIN

= +5V, T

+25 °C,

ChgEn = 0

5.3

CHGIN

= +5V, T

+25 °C,

Suspend Mode (FSUS = High)

0.98

CHGIN TO BYP PATH
Allowed CHGIN Input

Voltage Range

CHGIN_RNG

CHGIN Detect

Threshold

BDET

Rising

3.8

3.9

4.0

BDET_F

Falling

3.6

3.7

3.8

CHGIN Overvoltage

Threshold

OVP

Rising

5.59

5.66

5.72

OVP_F

Falling

5.56

OVP_H

Hysteresis

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer

board. For detailed information on package thermal considerations, refer to

Absolute Maximum Ratings

Stresses beyond those listed under †œAbsolute Maximum Ratings† may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these

or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

Package Thermal Characteristics

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CHGIN-BYP Resistance

CHGIN_BYP

CHGIN

= 5V

CHGIN-BYP Soft-Start

Timeout

BYP_SFTTO

If V

BYP

has not reached within

50mV of V

CHGIN

at timeout, a fault

is flagged by SysFlt of register

0x02.

100

CHGIN-BYP Soft-Start

Current

BYP_SFT

CHGIN-BYP Soft-Start

End Comparator

BYP_SFTEND

CHGIN-BYP Overload

Comparator

BYP_OVL

290

360

420

Input Current Limit

LIM

SpvChgILim[4:0] = 00100

0.4

SpvChgILim[4:0] = 01110

1.5

SpvChgILim[4:0] = 11101

Input Current Limit

Programming Range

LIM_RNG

0.1

Input Current Limit

Programming Step

LIM_STEP

100

INTERNAL SUPPLIES
Internal V

CCINT

Regulator

CCINT

CHGIN

= 5V, boost off

4.0

4.3

4.6

Boost Regulator BREG

BREG

4.3

CCINT

UVLO

Threshold

UVLO

CCINT

rising

3.1

3.4

3.7

CCINT

falling

3.0

3.3

3.6

CCINT

UVLO

Threshold Hysteresis

UVLO_HYS

Hysteresis

100

BAT UVLO Threshold

BATUVLO

Rising

BAT UVLO Hysteresis

BATUVLO_H

100

SFOUT LDO Voltage

SFOUT

SfOutLvl = 1, V

CHGIN

= 6V,

SFOUT

= 0

3.15

3.3

3.45

SfOutLvl = 1, V

CHGIN

= 6V,

SFOUT

= 15mA

2.95

SfOutLvl = 0, V

CHGIN

= 6V,

SFOUT

= 0

5.0

5.25

5.5

SfOutLvl = 0, VCHGIN = 6V,

SFOUT

= 15mA

4.9

SFOUT Maximum

Current

SFOUT_MAX

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Current Reduce

Temperature

CHG_LIM

120

°C

Thermal Shutdown

Temperature

SHUTDOWN

150

°C

Thermal Shutdown

Hysteresis

SHUTDOWN_H

°C

BYP UVLO Threshold

BYPUVLO

BYPUVLO[2:0] = 000, V

BYP

falling

3.8

BYPUVLO[2:0] = 001, V

BYP

falling

3.9

BYPUVLO[2:0] = 010, V

BYP

falling

4.0

BYPUVLO[2:0] = 011, V

BYP

falling

4.1

BYPUVLO[2:0] = 100, V

BYP

falling

4.2

BYPUVLO[2:0] = 101, V

BYP

falling

4.3

BYPUVLO[2:0] = 110, V

BYP

falling

4.4

BYPUVLO[2:0] = 111, V

BYP

falling

4.5

BYP UVLO Threshold

Hysteresis

BYPUVLO_H

SYS UVLO (SYSOK)

Threshold

SYSUVLO

VPChg[2:0] = 000, V

SYS

rising

5.9

VPChg[2:0] = 001, V

SYS

rising

6.0

VPChg[2:0] = 010, V

SYS

rising

6.1

VPChg[2:0] = 011, V

SYS

rising

6.2

VPChg[2:0] = 100, V

SYS

rising

6.3

VPChg[2:0] = 101, V

SYS

rising

6.4

VPChg[2:0] = 110, V

SYS

rising

6.5

VPChg[2:0] = 111, V

SYS

rising

6.6

SYS UVLO Threshold

Hysteresis

SYSUVLO_H

500

BYP-SYS BOOST PATH
Switching Frequency

BST_SW

0.8

MHz

Maximum Input Current

BST_MAX

L = 2.2 µH

Input Peak Current Limit

BST_LIM_PK

4.5

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Forced Input Current

Limit

IILIM_F

CurLim1Frc = 1 ,

CurLim1Set[4:0] =

00000

100

00001

200

00010

300

00011

400

00100

405

450

495

00101

600

00110

700

00111

800

01000

900

01001

1000

01010

1100

01011

1200

01100

1300

01101

1400

01110

1500

01111

1600

10000

1700

10001

1800

10010

1900

10011

2000

10100

2100

10101

2200

10110

2300

10111

2400

11000

2500

11001

2600

11010

2700

11011

2800

11100

2900

11101

3000

11110

3100

11111

3200

Efficiency

EFF

BST

SYS

= 1000mA, V

BAT

= 7.4V,

L1 = Bourns SRP4012TA-2R2M

91.6

SYS Regulation Voltage

SYS_REG

Charger disabled

BAT

+ 0.4

Charger in precharge, V

BAT

= 5V

PCHG

+ 0.4

SYS Regulation Voltage

Limit

SYS_LIM

See Battery Charger State

Diagram

SYS_REG

- 0.2

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

BYP-SYS BUCK PATH
Switching Frequency

BK_SW

0.8

MHz

Maximum Output

Current

BK_MAX

L = 2.2 µH

500

Short-Circuit Peak

Current Limit

BK_LIM

1.3

Efficiency

EFF

CHGIN

= 500mA , V

BAT

= 7.4V,

L1 = Bourns SRP4012TA-2R2M

Output Voltage Range

BK_OUT_RNG

5.5

Output Accuracy

BK_OUT_ACC

-1.5

+1.5

SYS-BAT CHARGER/SWITCH CONTROLLER
BAT-to-SYS Regulation

Voltage

BAT-SYS_ON

-20

BAT-to-SYS Switch Fast

Turn-On Threshold

BAT-SYS_OFF

SYS

falling

-100

BAT-to-SYS Switch On-

Resistance

BAT_SYS

mΩ

Charger Current

Soft-Start Time

CHG_SOFT

PRECHARGE

Precharge Current

PCHG

IPChg[1:0] = 00

FCHG

IPChg[1:0] = 01

IPChg[1:0] = 10

IPChg[1:0] = 11, R

SET

= 20kΩ

Prequalification

Threshold

PCHG

VPChg[2:0] = 000

5.7

VPChg[2:0] = 001

5.8

VPChg[2:0] = 010

5.9

VPChg[2:0] = 011

6.0

VPChg[2:0] = 100

6.1

VPChg[2:0] = 101

6.2

VPChg[2:0] = 110

6.3

VPChg[2:0] = 111

6.4

Prequalification

Threshold Hysteresis

PCHG_H

100

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

FAST CHARGE
SET Current Gain Factor

SET

10000

A/A

SET Regulation Voltage

SET

Fast-Charge Current

FCHG

SET

= 20kΩ

0.43

0.5

0.57

SET

= 20kΩ, T = 25 °C

0.475

0.5

0.525

SET

= 10kΩ

SET

= 4kΩ

2.5

Fast-Charge Current

Scaling

FCHG_T

T_T_IFChg[2:0] = 000

FCHG

T_T_IFChg[2:0] = 001

T_T_IFChg[2:0] = 002

T_T_IFChg[2:0] = 003

T_T_IFChg[2:0] = 004

T_T_IFChg[2:0] = 005

T_T_IFChg[2:0] = 006

T_T_IFChg[2:0] = 007

100

1/2 Fast-Charge Current

Comparator Threshold

FC_HALF

FCHG

1/5 Fast-Charge Current

Comparator Threshold

FC_FIFTH

FCHG

MAINTAIN CHARGE

Charge Done

Qualification

CHG_DONE

ChgDone[1:0] = 00

FCHG

ChgDone[1:0] = 01

ChgDone[1:0] = 10, R

SET

= 20kΩ

BAT Regulation Voltage

BATREG

BatReg[1:0] = 00, T

= +25 °C

8.258

8.3

8.342

BatReg[1:0] = 00,

= -40 °C to +85 °C

8.217

8.3

8.383

BatReg[1:0] = 01

8.4

BatReg[1:0] = 10

8.5

BatReg[1:0] = 11

8.6

BAT Recharge

Threshold

BATRECHG

BatReChg[1:0] = 00

200

BatReChg[1:0] = 01

300

BatReChg[1:0] = 10

400

BatReChg[1:0] = 11

500

CHARGE TIMER

Maximum

Prequalification Time

PCHG

PChgTmr[1:0] =00

min

PChgTmr[1:0] = 01

PChgTmr[1:0] = 10

120

PChgTmr[1:0] = 11

240

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Maximum Fast-Charge

Time

FCHG

FChgTmr[1:0] = 00

Min

FChgTmr[1:0] = 01

150

FChgTmr[1:0] = 10

300

FChgTmr[1:0] = 11

600

Maintain Charge Time

TOCHG

MtChgTmr[1:0] = 00

Min

MtChgTmr[1:0] = 01

MtChgTmr[1:0] = 10

MtChgTmr[1:0] = 11

Timer Accuracy

ACC

-10

+10

Timer Extend Threshold

TIMERX

If charge current is reduced due to

LIM

or T

DIE

, this is the percentage

of charge current below which

timer clock operates at half speed

Timer Suspend

Threshold

TIMERSUS

If charge current is reduced due to

LIM

or T

DIE

, this is the percentage

of charge current below which

timer clock pauses

THERMISTOR MONITOR AND NTC DETECTION

THM Hot Threshold

THM

falling, WarmCoolSel = 0

21.3

23.3

25.3

TPU

THM

falling, WarmCoolSel = 1

30.9

32.9

34.9

THM Warm Threshold

THM

falling, WarmCoolSel = 0

30.9

32.9

34.9

TPU

THM

falling, WarmCoolSel = 1

46.5

53.5

THM Cool Threshold

THM

rising, WarmCoolSel = 0 or 1

62.5

64.5

66.5

TPU

THM Cold Threshold

THM

rising, WarmCoolSel = 0 or 1

71.9

73.9

75.9

TPU

THM Disable Threshold

THM_DIS

THM

rising

91.0

93.0

95.0

TPU

THM Threshold Hysteresis

THM_DIS_H

JEITA BAT Voltage

Reduction

BAT_JEITA

300

THM Input Leakage

THM_LK

-1

µA

THM Detection Time

THM_DET

0.35

DIGITAL I/O (SDA, SCL,

FLTIN

, INT, SYSOK, FSUS, LED, CDIR)

Leakage Current

IO_LK

-1

µA

Logic Input High-Voltage

IO_IH

1.4

Logic Input Low-Voltage

IO_IL

0.5

Logic Output Low-Voltage

IO_OL

= 4mA

0.4

FSUS Input Pulldown

Resistance

FSUS_PD

470

kΩ

SDA, SCL Bus Low-

Detection Current

SDA

= V

SCL

= 0.4V

0.2

0.4

µA

SCL Clock Frequency

SCL

Note 3

400

kHz

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Bus Free Time Between

a STOP and START

Condition

BUF

1.3

µs

START Condition

(Repeated) Hold Time

HD_SDA

Note 3

0.6

µs

Low Period of SCL

Clock

LOW

1.3

µs

High Period of SCL

Clock

HIGH

0.6

µs

Setup Time for a

Repeated START

Condition

SU_STA

0.6

µs

Data Hold Time

HD_DAT

Note 4

0.9

µs

Data Setup Time

SU_DAT

Note 4

100

Setup Time for STOP

Condition

SU_STO

0.6

µs

Spike Pulse Widths

Suppressed by Input

Filter

Note 5

BC1.2 DETECTION
V

DP_SRC

Voltage

DP_SRC

SRC06

LOAD

= 0 to 200 µA

0.5

0.6

0.7

DM_SRC

Voltage

DM_SRC

SRC06

LOAD

= 0 to 200 µA

0.5

0.6

0.7

D33

Voltage

SRC33

LOAD

= 0 to 365 µA

2.6

3.4

DAT_REF

Voltage

DAT_REF

0.25

0.32

0.4

LGC

Voltage

LGC

1.5

1.7

1.9

DM_SINK

Current

DM_SINK

DATSINK

0.15V to 3.6V

105

µA

DP_SRC

Current

DP_SRC

DCD

0V to 2.5V

μA

DM_DWN

Resistor

DM_DWN

DWN15

kΩ

WEAK

Current

WEAK

0.01

0.1

0.5

µA

BUS31

Threshold

BUS31

DP and DN pins. Threshold in

percent of V

BUS

voltage

4V < V

BUS

< 5.5V

BUS47

Threshold

BUS47

DP and DN pins. Threshold in

percent of V

BUS

voltage

4V < V

BUS

< 5.5V

43.3

51.7

BUS64

Threshold

BUS64

DP and DN pins. Threshold in

percent of V

BUS

voltage

4V < V

BUS

< 5.5V

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Charger Detection Debounce

CDDEB

Primary-to-Secondary Timer

PDSDWAIT

Proprietary Charger

Debounce

PRDEB

7.5

Data Contact Detect

Timeout

DCDTMO

DCD2s = 0

700

800

900

DCD2s = 1

1.8

2.0

2.2

DP/DN Overvoltage

Debounce

OVDXDEB

100

110

µs

OVDX Comparator

OVDX

THRESHOLD

Rising

0.15

Falling

-0.04

+0.08

CDP/CDN Pulldown

Resistor

CDP/CDN_PD

mΩ

TYPE-C DETECTION
V

CONN

Switch Voltage Drop

CONN_REQ

CONN

= 5.5V, I

CC_LOAD

= 20mA

5.5

5.6

CONN

Bulk Capacitance

VCONN

220

µF

CC Pin Operational

Voltage Range

CONN_RNG

5.5

CC Pin Voltage in DFP

3.0A Mode

CC_PIN30

3.1

CC Pin Voltage in DFP

1.5A Mode

CC_PIN15

1.85

CC Pin Low-Power Mode

Pulldown Resistance

LPPD_CC_

170

kΩ

CC Pin Low-Power Mode

Voltage Threshold

LP_CC_

Rising

0.7

CC Pin Clamp Requirements

CC_PIN_CLAMP

60 µA ≤ I

CC_

≤ 600 µA

1.1

1.32

CC UFP Pulldown Resistance

DUFP_CC_

4.59

5.1

5.61

kΩ

CC DFP 0.5A Current

Source

DFP0.5_CC_

µA

CC DFP 1.5A Current

Source

DFP1.5_CC_

165.6

180

194.4

µA

CC DFP 3.0A Current

Source

DFP3.0_CC_

303.6

330

356.4

µA

CC R

and R

Threshold

RA_RD0.5

Rising

0.16

0.2

0.25

Falling

0.15

CC UFP 0.5A R

Threshold

UFP_RD0.5

Rising

0.62

0.66

0.7

Falling

0.61

CC UFP 1.5A R

Threshold

UFP_RD1.5

Rising

1.17

1.23

1.31

Falling

1.16

CC V

CONN

Detect

Threshold

VCONN_DET

Rising

2.11

2.25

2.4

Falling

2.1

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CC DFP V

OPEN

Detect

Threshold

DFP_VOPEN

Rising

1.51

1.575

1.65

Falling

1.5

CC DFP V

OPEN

with

3.0A Detect Threshold

DFP_VOPEN3A

Rising

2.46

2.6

2.75

Falling

2.45

BUS

Valid

BDET

Rising

3.8

4.12

4.4

BUS

Valid Hysteresis

BDET_H

Falling hysteresis

0.7

BUS

Discharge Value

SAFE0V

Falling. Voltage level where a

connected UFP will find V

BUS

removed.

0.6

0.7

0.84

Rising hysteresis

100

CC Pin Power-Up Time

CLAMPSWAP

The maximum time allowed from

removal of voltage clamp to

attachment of the 5.1k resistor

Type-C CC Pin

Detection Debounce

CCDEB

100

200

Type-C Debounce

PDDEB

Type-C Quick Debounce

QDEB

0.9

1.9

BUS

Debounce

VBDEB

SAFE0V

Debounce

VSAFE0VDEB

Type-C Error Recovery

Delay

ERRORRECOVERY

Type-C DRP Toggle

Time

DRP

100

Duty Cycle of DRP

Swap

DRP

Duty cycle of UFP to DFP role

swap

DRP Transition Time

DRPTRAN

Time a role swap from DFP to UFP

or reverse is completed

DRP Lock Time

DRPLOCK

DRP Lock wait time before

transition to unattached state

100

150

CONN

Enable Time

VCONNON

Time from when V

BUS

is supplied

in DFP mode in state Attach.DFP.

DRPWait

CONN

Disable Time

VCONNOFF

Time from UFP detached or as

directed by I

C command until

CONN

is removed

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.3V, T

= -40 °C to +85 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

Note 2: All devices are 100% production tested at T

= +25 °C. Limits over the operating temperature range are guaranteed by

design and characterization.

Note 3: f

SCL

must meet the minimum clock low time plus the rise/fall times.

Note 4: The maximum t

HD:DAT

has to be met only if the device does not stretch the low period (t

LOW

) of the SCL signal.

Note 5: Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CC Pin Current Change

Time

SINKADJ

Time from CC pin changes state in

UFP mode until current drawn from

DFP reaches new value

BUS

On-Time

VBUSON

Time from UFP is attached until

BUS

275

BUS

Off-Time

VBUSOFF

Time from UFP is detached until

BUS

reaches V

SAFE0V

650

BVCEN Output Low-

Voltage

BVCEN_OL

SINK

= 1mA

0.4

BVCEN Output High-

Voltage

BVCEN_OH

SOURCE

= 1mA

CCINT

- 0.4

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Electrical Characteristics (continued)

BAT

= 8.5V, T

= -20 °C to +70 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

MAX14748

USB Type-C Charger

Maxim Integrated •”‚

www.maximintegrated.com

Typical Operating Characteristics

7.2

7.4

7.6

7.8

800

1600

2400

3200

SYS

)

CHGIN

(mA)

SYS

vs. I

CHGIN

toc04

BAT

= 7.4V

SpvChgILim[4:0] = 11101

SpvChgILim[4:0] = 01110

SpvChgILim[4:0] = 00100

4.9

4.94

4.98

5.02

5.06

5.1

100

200

300

400

500

CHG

)

CHGIN

(mA)

BUCK OUTPUT LOAD REGULATION

toc05

BAT

= 7.4V

100

300

600

900

1200

1500

ENCY

)

SYS

(mA)

BOOST EFFICIENCY vs. LOAD

toc06

BAT

= 6.0V

BAT

= 8.6V

BAT

= 7.4V

INPUT: CHGIN
OUTPUT: SYS
L1 = BOURNS SRP4012TA-2R2M

120

160

200

Y I

CURRE

( µ

BATTERY VOLTAGE V

BAT

(V)

BAT

vs. V

BAT

toc01

LOW POWER MODE,
CHGIN FLOATING

TYPE-C ADAPTER
ATTACHED

NOT LOW POWER
MODE, CHGIN FLOATING

ChgEn =0

0.4

0.8

1.2

1.6

0.00

50.00

100.00

150.00

200.00

250.00

Y CURRE

)

Y VO

E (

TIME (MINUTE)

BAT

and V

BAT

vs. TIME

toc02

2200mAH BATTERY
ChgDone[1:0] = 00
IPChg[1:0] = 00
VPChg[2:0] = 001
R

SET

= 10k

VOLTAGE

CURRENT

6.5

6.9

7.3

7.7

8.1

8.5

500

1000

1500

2000

SYS

)

SYS

(mA)

SYS

vs. I

SYS

toc03

BAT

= 7.4V

SpvChgILim[4:0] = 11101

SpvChgILim[4:0] = 01110

SpvChgILim[4:0] = 00100

100

200

300

400

500

ENCY

)

CHGIN

(mA)

REVERSE BUCK

EFFICIENCY vs. LOAD

toc07

BBFrxZX = 0

INPUT: BAT
OUTPUT: CHGIN
L1 = BOURNS SRP4012TA-2R2M

BBFrxZX = 1

toc08

2ms/div

BOOST TRANSIENT RESPONSE

SYS

1V/div

SYS

500mA/div

BAT

= 7.4V,

ChgEn = 0

500mA/div

toc09

200

ms/div

BUCK TRANSIENT RESPONSE

(BBFrxZX = 1)

SYS

1V/div

CHGIN

INDUCTOR

500mA/div

1V/div

BAT

= 8.5V, T

= -20 °C to +70 °C, all registers in their default state, unless otherwise noted. Typical values are at V

CHGIN

= 5.0V,

BAT

=7.4V, V

SYS

= V

BATREG

, T

= +25 °C.)

MAX14748

USB Type-C Charger

Maxim Integrated •”‚

www.maximintegrated.com

Typical Operating Characteristics (continued)

400

800

1200

1600

2000

100

CURRE

(

)

SET

FAST CHARGE CONSTANT

CURRENT vs. R

SET

toc13

500mA/div

toc10

200

ms/div

BUCK TRANSIENT RESPONSE

(BBFrxZX = 0)

SYS

1V/div

CHGIN

INDUCTOR

500mA/div

1V/div

toc16

TIME (0.2ns/div)

EYE DIAGRAM

(WITH DEVICE PRESENT)

SB D

FER

(V)

0.1V/div

L3OUT

= 3.0V

SYS

= 300mA

-40

-15

CHA

ING

CURRE

(mA

)

TEMPERATURE ( °C)

PRECHARGE CURRENT vs.

TEMPERATURE

toc11

SET

= 10k

IPChg[1:0] = 00

900

940

980

1020

1060

1100

-40

-15

CHA

ING

CURRE

(mA

)

TEMPERATURE ( °C)

FAST CHARGE CONSTANT

CURRENT vs. TEMPERATURE

toc12

SET

= 10k

8.2

8.4

8.6

8.8

-40

-15

Y R

E (

TEMPERATURE ( °C)

BATTERY REGULATION

VOLTAGE vs. TEMPERATURE

toc14

SET

= 10k

toc15

TIME (2ns/div)

EYE DIAGRAM

(WITHOUT DEVICE PRESENT)

SB D

FER

(V)

0.1V/div

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Bump Configurations

GND

THM

VTPU

GND

BREG

FSUS

SYSOK

NVP

SDA

LED

GND

CC1

SCL

CC2

CDN

FLINT

COMP

CHGIN

GND

CDIR

CDP

TDP

CHGIN

INT

VCONN

BST

TPU

DGND

TDN

SYS

SET

BYP

PGND

SYS

BAT

BYP

PGND

CHGIN

SYS

BAT

BYP

PGND

SYS

BAT

BYP

PGND

TOP VIEW

(BUMP SIDE DOWN)

MAX14748

WLP

3.968mm x 2.768mm

VCCINT

SFOUT

BVCEN

BUMP

NAME

FUNCTION

AGND

Analog Ground.

FLTIN

Charger Fault Input. Logic-low on this pin forces the charger into a fault state and generates an

interrupt. See Register 0x35 description for more information. Connect to digital I/O supply if not used.

SYSOK

Open-Drain Status Output of SYS Regulation. When V

SYS

is above the SYS UVLO threshold and Boost

is active, this output is high-impedance. When V

SYS

is below the SYS UVLO threshold, this output is

low. Leave unconnected if not used.

TPU

High-Side of Internal Resistor for THM Detection. Connect a 10k resistor between this pin and THM.

COMP

Buck/Boost Converter Compensation Connection. Connect a 3.9nF capacitor for internal Buck/Boost

compensation

SET

External Resistor Connection for Fast Charge Current Setting. Connect a resistor to this pin to set the

fast charge current. Other charge currents are set as a proportion of fast charge current based on I

A7-A9

BAT

Battery Connection. Connect a 2s Li-ion+ battery from BAT to GND. Bypass to PGND with a parallel combination

of a 0.1 µF capacitor and an effective 10 µF - 30 µF capacitor. Keep the capacitors as close to BAT as possible and

keep the stray inductance and resistance of the trace from BAT to the battery terminal as low as possible.

CC2

USB Type-C CC2. Connect to CC2 on USB Type-C connector.

FSUS

Force Suspend Input. Logic-high on this pin causes the input limiter to open and input current from CHGIN is reduced

to zero. This pin is internally pulled to GND through a 470kΩ (typ) resistor and has no effect if FSUSMsk = 1.

DGND

Digital Ground.

TPU

External Voltage Input for TPU connection. Connect to external supply or V

CCINT

BREG

Bypass for Internal Switching Converter Supply. Bypass with 1 µF capacitor to AGND.

B6-B9

SYS

System Load Connection. Connect SYS to the system load. Bypass to PGND with a parallel combination

of a 0.1 µF capacitor and an effective 22 µF capacitor. (Note: there is a diode between SYS and BAT)

CONN

External V

CONN

Supply Input. Leave unconnected if not used.

SCL

C Serial Clock Input. Connect an external pull-up resistor.

CCINT

Bypass For Internal Analog Supply. Bypass with 1 µF capacitor to GND.

C4, D4,

GND

Ground.

BST

Charge Pump Connection. Connect a 0.1 µF capacitor between BST and LX.

C6, C7,

C8, C9

Switching Node of Boost Converter. Connect a 1.5 µH or 2.2 µH inductor between LX and BYP. See

Applications Information section for more details.

CC1

USB Type-C CC1. Connect to CC1 on USB Type-C connector.

SDA

C Serial Data Input/Output. Connect an external pullup resistor.

INT

Active-Low, Open-Drain Interrupt Output. Connect an external pullup resistor.

D6, D7,

D8, D9

PGND

Power Ground.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Bump Description

BUMP

NAME

FUNCTION

CDN

USB Connector D-Input. Leave unconnected if not used.

LED

LED Charging Status Indicator. Open-drain output indicating battery charging status. When LEDAuto = 1 and

a temperature fault is detected, the output is pulsed at 50% duty cycle for a period of 1.5s. When a charge

timer expires or SysFlt fault occurs, LED is pulsed at 50% for a period of 0.15s. When LEDAuto = 0, the open-

drain output is controlled by the LEDCtrl bit. Connect this pin to GND if unused.

THM

Battery Temperature Thermistor Measurement Connection. This pin is used for NTC thermistor presence

detection and JEITA compliant temperature control.

SFOUT

Output of overvoltage protected LDO powered from CHGIN. Bypass SFOUT with a 1 µF ceramic

capacitor to GND.

CDIR

USB Cable Orientation Open-drain Output. When CC1 is active, this output is pulled low. Otherwise, this

output is high-impedance. Leave unconnected if not used.

E6-E9

BYP

Bypass Connection. Bypass to PGND with a parallel combination of a 0.1 µF capacitor and an effective

10 µF capacitor.

CDP

USB Connector D+ Input. Leave unconnected if not used.

TDP

USB Transceiver D+ Connection. Connect TDP to device microprocessor USB transceiver D+ line.

Leave unconnected if not used.

TDN

USB Transceiver D- Connection. Connect TDN to device microprocessor USB transceiver D- line. Leave

unconnected if not used.

BVCEN

External V

CONN

Supply Enable Output. Push-pull output between V

CCINT

and GND. Leave

unconnected if not used.

NVP

Negative Voltage PFET Gate Control. Leave unconnected if not used.

F6-F9

CHGIN

USB Charger Input. Bypass this pin with a 1 µF capacitor to PGND.

Note: All capacitance values listed in this document refer to effective capacitance. Be sure to specify capacitors that will meet these

requirements under typical system operating conditions taking into consideration the effects of voltage and temperature.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Bump Description (continued)

Detailed Description

The MAX14748 is a battery charger with a Smart Power

Selector that safely charges two Li+ cell in accordance

with JEITA specifications*.

Input OVP

The MAX14748 CHGIN input is protected by an internal

N-channel FET. The device monitors the voltage at

CHGIN and, if CHGIN is greater than V

OVP

, switches

off the internal FET to prevent damage to the device.

If V

CHGIN

is above the overvoltage threshold or below

the USB valid voltage threshold, the MAX14748 enters

overvoltage lockout (OVLO). During OVLO, the internal

circuits remain powered, the SYSOK pin is high-impedance,

and an interrupt is asserted. During OVLO, the charger

turns off and the system load switch closes, allowing the

battery to power SYS.

Negative Voltage Protection (NVP)

The MAX14748 provides a gate protection circuit for an

external PFET that protects against negative voltages on

BUS

. NVP pin drives the gate of the external PFET. If a

negative voltage is present on V

BUS

, e.g., by a backwards

connector, the NVP turns off the external PFET, therefore

providing negative voltage protection.

Low Power Mode

The MAX14748 features a Low Power mode, which

reduces the battery current consumption from 25 µA to

140 µA. To enter Low Power mode, write 1 to LowPowEn

(Register 0x33[7]). To manually exit Low Power mode,

set LowPowAbort (Register 0x33[1]) to 1. If a DFP pullup

connect to CC1/CC2 is detected, the device automatically

exits Low Power mode and resumes normal operations.

Input Current Limiter

The primary function of the input limiter is supplying

power from the external adapter at CHGIN to the system

load and battery charger. In addition, it performs several

other functions to optimize use of the available power

efficiently and safely, including:

1) CHGIN Input Current Limiting: The CHGIN input current is

limited to prevent input overload. The current limit can be

automatically selected through charger detection to match

the capabilities of the source. The result is indicated by

for more

details. It can also be manually set through CurLim1Frc

illustrates

how the current limit setting is selected.

2) Thermal Limiting: In case the die temperature

exceeds the normal limit (T

CHG_LIM

), the MAX14748

will attempt to limit temperature increase by reducing

the input current at CHGIN. In this condition, the

system load has priority over charger current, so the

input current is first reduced by lowering the charge

current. If the junction temperature continues to rise

and reaches the maximum operating limit (T

BUS_LIM

no input current is drawn from CHGIN and the battery

powers the entire system load.

3) Adaptive Battery Charging: While the system is

powered from CHGIN, the charger draws power from

SYS to charge the battery. If the total load exceeds

the input current limit, the battery supplies supplmental

current to the load.

4) Adaptive Input Current Limiting: If the MAX14748

input current limit is programmed in such a way that

the adapter voltage collapses due to resistive drop,

current limiting, or poor load transient response,

the AICL loop allows the MAX14748 to regulate the

input voltage above a value needed to ensure proper

operation.

the AICL block and associated parameters are found

in the registers 0x2C to 0x2E.

*JEITA (Japan Electronics and Information Technology Industries Association) Standard, A Guide to the Safe Use of Secondary

Lithium Ion Batteries on Notebook-Type Personal Computers, April 20, 2007.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 1a. Automatic Input Current Limit Control

ChgTyp[1:0]

PrChgTyp[2:0]

CCIStat[1:0]

SDPMaxCur[1:0] CDPMaxCur[1:0]

LIM

SpvChgIlim[4:0]

†œxx†

†œxxx†

†œ11 = 3A†

†œ00†

†œ0†

0x1D

†œ11 = 1.5A†

†œxxx†

†œ11 = 3A†

†œxx†

†œx†

0x1D

†œxx†

†œ110 = 3A†

†œxx†

†œx†

0x1D

†œxx†

†œ101 = 2.4A†

†œ00† or

†œ01 = 500mA† or

†œ10 = 1.5A†

†œxx†

†œx†

2.4A

0x17

†œxx†

†œ100 = 2A† or

†œ001 = 2A†

†œ00† or

†œ01 = 500mA† or

†œ10 = 1.5A†

†œxx†

†œx†

0x13

†œ1x = 1.5A†

†œ000† or

†œ010 = 500mA†

†œ00† or

†œ01 = 500mA† or

†œ10 = 1.5A†

†œxx†

†œx†

1.5A

0x0E

†œ1x = 1.5A†

†œ000† or

†œ010 = 500mA†

or †œ011 = 1A†

†œ10 = 1.5A†

†œxx†

†œx†

1.5A

0x0E

†œxx†

†œ011 = 1A†

†œ00† or

†œ01 = 500mA†

†œxx†

†œx†

0x09

†œ01 = 500mA†

†œ000† or †œ010 =

500mA†

†œ00† or

†œ01 = 500mA†

†œxx†

†œx†

0.5A

0x04

†œ01 = 500mA†

†œ000†

†œ10 = 1.5A† or

†œ11 = 3A†

†œx†

0.5A

0x04

†œ01 = 500mA†

†œ000†

†œ10 = 1.5A† or

†œ11 = 3A†

†œX†

1.0A

0x09

†œ01 = 500mA†

†œ000†

†œ10 = 1.5A† or

†œ11 = 3A†

†œx†

1.5A

0x0E

†œ10 = 1.5A†

†œ000†

†œ11 = 3A†

†œ1†

1.5A

0x0E

†œ00†

†œxxx†

†œxx†

†œx†

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Figure 2. AICL Operation Flow Diagram

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

AICL INCREMENT

INPUT CURRENT = MIN

(STOP CURRENT, INPUT CURRENT + 100mA)

AICL PRECHECK

STOP CURRENT = AICLMaxI[4:0]

INPUT CURRENT = PREVIOUS SETTING

AICL IDLE

INPUT CURRENT = STOP CURRENT

AICL BLANK

INPUT CURRENT = 0,

STOP CURRENT = INPUT CURRENT - 100mA

VBDET MASKED AND OVP CLOSED

AICLAbort = 0 AND
AICLEn = 1

BYP

< V

BYPUVLO

AND TBLANK TIMEOUT

BYP

> V

BYPUVLO

AND

CHGIN

> V

BDET

BYP

< V

BYPUVLO

AICL OFF

STOP CURRENT = 500mA

MIN CURRENT = 100mA

INPUT CURRENT = PREVIOUS SETTING

AICL INIT

INPUT CURRENT = MIN CURRENT

BYP

> V

BYPUVLO

AND

INPUT CURRENT = STOP CURRENT

BYP

< V

BYPUVLO

TSTEP
TIMEOUT

AICLAbort = 1

AICLEn = 1

AICL NO CONNECTION

INPUT CURRENT = PREVIOUS SETTING

STOP CURRENT = 500mA

ChgStat[3:0] •‰ 0011

Boost Converter with Reverse Buck

Boost Mode

The MAX14748 boost converter operates as either a

current-limited voltage source, or current source, depending

on the charger operational state. When a valid USB voltage

is present at CHGIN, and the charger is disabled, V

SYS

is regulated to V

BAT

+ 400mV. If the charger is in

precharge mode, V

SYS

is regulated to V

PCHG

+ 400mV.

When the system is in fast-charge mode, the boost

converter operates as a current source, delivering

current into the SYS node that is shared by the battery

and system loads.

The boost converter current limit may be acted upon

by multiple system blocks, including the programmed

input current limit, thermal status, charging current, SYS

regulation voltage block, and battery termination voltage

block. The minimum requested current from these blocks

at any given time determines the active current limit in

the boost.

Reverse Buck Mode

The CHGIN-SYS switching converter may operate as a

buck converter when needed to supply a load attached to

CHGIN. The load may be a Type-C sink or some other

proprietary device.
If Type-C DRP operation is enabled, the buck converter

can be enabled by the Type-C state machine. The output

voltage of the buck can be programmed from 4V to 5.5V

in 0.1V steps by writing to BuckVSet[3:0], however, it is

not recommended to change the output voltage when the

buck is active.
The output of the buck converter turns off when a

fault occurs. The specific fault occurred is indicated by

DCDCILim, DCDCRunAway, DCDCPGood status bits

(register 0x04). See Register Descriptions for more

details. When the buck is disabled due to a fault, both

VBUSDet (register 0x07) and VSAFE0V (register 0x0A)

change to 0. After the fault condition is removed, the buck

converter can be restarted by writing 1 to CCSnkRst,

CCSrcRst, CCForceError, or USBCRset auto-reset bits.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Smart Power Selector

The Smart Power Selector seamlessly distributes power

between CHGIN, battery (BAT) and the system (SYS).

The basic modes of operation of the smart power selec-

tor are:
1. With a valid external power source:

a. The external power source at CHGIN is the

primary source of energy.

b.  The battery is the secondary source of energy.
c.  Energy delivery to SYS is the highest priority.
d.  Any energy that is not required by SYS is available

to the battery.

2. With no power source available at CHGIN:

a. The battery is the primary source of energy.
b. Energy delivery to SYS has the highest priority.

3. With a Type-C Sink or other load present at CHGIN:

a.  The battery is the primary source of energy.
b.  Energy delivery to SYS is the highest priority.
c.  Energy delivery to BYP is the second highest

priority.

4. SYS Regulation Voltage:

a. When the charger path is enabled and the

charger is disabled, V

SYS

is regulated to V

BAT

400mV and BAT switch is off.

b. When the charger is enabled but in a non-charging

state such as maitain charge done, thermistor

suspend, or timer fault, V

SYS

is regulated to

BAT

+ 400mV and BAT switch is off.

c. When the input charger path is enabled and the

battery is charging in prequalification, V

SYS

regulated to V

PCHG

+ 400mV. Charge current is

reduced when V

SYS

approaches V

PCHG

+ 200mV.

d. When the input charger path is enabled and the

battery is charging in fast-charge or maintain charge

done, the BAT switch is closed and V

SYS

= V

BAT

. In

maintain charge done state, the connection between

SYS and BAT acts as an ideal diode. Therefore,

when V

SYS

drops below V

BAT

, the BAT switch is

turned fully on and the battery supplements the SYS

load along with the current from CHGIN.

e. When the switching converter is enabled as a

reverse buck, the BAT switch is closed and

SYS

= V

BAT

Short-Circuit Protection

The MAX14748 provides short-circuit protection to the

power nodes. When SYS is shorted to ground, input

current from CHGIN is limited by boost converter current

limit. Note in this case, FET diode from BAT-SYS prevents

control of FET BAT-SYS current. Battery current is not

limited by the MAX14748 and a pack protector is needed

to limit the battery current.
When either BYP or CHGIN is shorted to ground, the current

from BAT is limited by the reverse buck converter.

USB Type-C 1.1

USB Type-C 1.1 UFP and DRP Support

The MAX14748 provides support for devices functioning as

a Upstream Facing Port (UFP) or Dual Role Port (DRP)

per the current USB Type-C 1.1 specification. When acting

as a power source in DRP mode, the MAX14748 can provide

a 5V V

BUS

on the CHGIN pin through operation of the

reverse buck converter. The USB Type-C V

CONN

supply

is provided externally via the V

CONN

pin, and switched

internally onto one of the CC pins. An open-drain output

pin, BVCEN, is provided to enable the external V

CONN

supply based on the Type-C state machine output.

BVCEN is a push-pull output between GND and V

CCINT

USB BC1.2 Compliant and Nonstandard Charger

Support

The BC1.2 charger detection and special charger detection

routine is embedded within the Type-C state machine.

The BC1.2 and Special Charger detection routine runs

always when the state machine enters the †˜AttachWait.

SNK’ state of the USB Type-C 1.1 state-machine.

USB Type-C Adapter Insertion

and

depict the general timings when

a USB Type-C adapter is attached. For more information

on the behavior and timings of the USB Type-C 1.1 state-

machine, please refer to the USB Type-C specification.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Figure 4. Battery Charger State Diagram

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

MAINTAIN

CHARGE DONE

ChgStat = 0110

LED = OFF

CHG

= 0

CHARGER OFF

ChgStat = 0000

LED = OFF

CHG

= 0

PREQUAL

ChgStat = 0010

LED = ON

CHG

= I

PCHG

FAST

CHARGE

(CONSTANT CURRENT)

ChgStat = 0011

LED = ON

CHG

= I

FCHG

FAST

CHARGE

(CONSTANT VOLTAGE)

ChgStat = 0100

LED = ON

MAINTAIN

CHARGE

ChgStat = 0101

LED = ON

CHG

< I

CHG_DONE

FRESH BATTERY

INSERTION

ChgStat = 0110

LED = 1s PULSE

CHG

= 0

TIMER FAULT

ChgStat = 0111

LED = 0.15s PERIOD

CHG

= 0

ChgEn = 1,

BAT

< V

BATREG

- V

BATRECHG

AND V

BAT

< V

PCHG_R

AND V

SYS

> V

BAT

+ TBDV

BAT

> V

PCHG_R

RESET CHARGE TIMER

BAT

< V

PCHG_R

VOLTAGE MODE

= 1*

VOLTAGE MODE

= 0*

RECOVER FROM FAULT RESET

CHARGE TIMER

ChgEn = 1,

BAT

BATREG

- V

BATRECHG

ChgEn = 1,

Fresh battery AND

BAT

BATREG

- V

BATRECHG

CHG

> I

CHG_DONE

and

VOLTAGE MODE = 1*

RESET CHARGE TIMER

CHG

< I

CHG_DONE

AND V

SYS

> V

SYS_LIM

AND T

DIE

< T

CHG_LIM

RESET CHARGE TIMER

CHG

> I

CHG_DONE

and

VOLTAGE MODE=0*

RESET CHARGE TIMER

CHG_TIMER

> t

MTCHG

AND

ChgAutoStp = 1

BAT

< V

BATREG

- V

BATRECHG

AND ChgAutoReSta = 1

AND V

SYS

> V

SYS_LIM

CHG_TIMER

> t

PCHG

CHG_TIMER

> t

FCHG

DIE

> T

BUS_LIM

OR V

BAT

> V

SYS

OR ChgEn=0

FROM ANY STATE

NOTES:

* VOLTAGE MODE IS AN INTERNAL SIGNAL
** CHARGE TIMER IS SLOWED BY 50% IF I

CHG

FCHG

/2 AND PAUSED IF I

CHG

< I

FCHG

/5 ONLY IN FAST CHARGE CONSTANT CURRENT STATE

SYSTEM FAULT

ChgStat = 0111

LED = 0.15s PERIOD

CHG

= 0

JEITA VOLTAGE LIMITATION

AND ChgAutoStp = 1

BAT

< V

PCHG_R

ChgEn = 1,

BAT

< V

BATREG

- V

BATRECHG

AND V

BAT

> V

PCHG_R

AND V

SYS

> V

SYS_LIM

CHG_TIMER

> t

FCHG

LINEAR FAST

CHARGE

(CONSTANT VOLTAGE)

ChgStat = 0100

LED = ON

CHG

< 20% I

FCHG

BAT

< V

BATREG

- V

BATRECHG

Figure 5. Battery Charger State Diagram (continued)

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

PAUSE

CHARGE

TIMER

PAUSE

CHARGE

TIMER

PAUSE

CHARGE

TIMER

From PREQUAL

JEITA ERROR

To PREQUAL

NO JEITA ERROR

From FAST CHARGE CC

JEITA ERROR

From FAST CHARGE CV

JEITA ERROR

From FRESH BATTERY INSERTION ,

MAINTAIN CHARGE DONE ,

MAINTAIN CHARGE

JEITA ERROR

To CHARGER OFF

RESET CHARGE TIMER

NO JEITA ERROR

From PREQUAL

FLTIN = Low

To PREQUAL

FLTIN = High

From FAST CHARGE CC

FLTIN = Low

From FAST CHARGE CV

FLTIN = Low

To LINEAR FAST CHARGE

FLTIN = High

To CHARGER OFF

FLTIN = High

BATTERY FAULT

CHARGE SUSPEND

ChgStat = 1000

LED = 0.15s period

CHG

= 0

From FRESH BATTERY INSERTION ,

MAINTAIN CHARGE DONE ,

MAINTAIN CHARGE

FLTIN = Low

BATTERY TEMP

CHARGE SUSPEND

ChgStat = 0001

LED = 1.5s PERIOD

CHG

= 0

PAUSE

CHARGE

TIMER

PAUSE

CHARGE

TIMER

PAUSE

CHARGE

TIMER

BATTERY TEMP

CHARGE SUSPEND

ChgStat = 0001

LED = 1.5s PERIOD

CHG

= 0

BATTERY TEMP

CHARGE SUSPEND

ChgStat = 0001

LED = 1.5s PERIOD

CHG

= 0

BATTERY TEMP

CHARGE SUSPEND

ChgStat = 0001

LED = 1.5s PERIOD

CHG

= 0

BATTERY FAULT

CHARGE SUSPEND

ChgStat = 1000

LED = 0.15s period

CHG

= 0

BATTERY FAULT

CHARGE SUSPEND

ChgStat = 1000

LED = 0.15s period

CHG

= 0

BATTERY FAULT

CHARGE SUSPEND

ChgStat = 1000

LED = 0.15s period

CHG

= 0

To LINEAR FAST CHARGE

FLTIN = High

PAUSE

CHARGE

TIMER

From LINEAR FAST CHARGE

JEITA ERROR

To LINEAR FAST CHARGE

NO JEITA ERROR

From LINEAR FAST CHARGE

FLTIN = Low

To LINEAR FAST CHARGE

FLTIN = High

PAUSE

CHARGE

TIMER

BATTERY TEMP

CHARGE SUSPEND

ChgStat = 0001

LED = 1.5s PERIOD

CHG

= 0

BATTERY FAULT

CHARGE SUSPEND

ChgStat = 1000

LED = 0.15s period

CHG

= 0

To LINEAR FAST CHARGE

NO JEITA ERROR

To LINEAR FAST CHARGE

NO JEITA ERROR

Li-ion Battery Charger

Charger Overview

The MAX14748 utilizes a boost converter to generate

the necessary voltage to charge a 2s Li-ion battery from

a nominal 5V USB charger input. Depending on the

charging phase, the boost converter will operate as either

a current-limited voltage source or current source. The

charger is configured through a combination of external

components and I

C registers settings.

and

Battery Charger State Diagram.

Precharge

In precharge and charge termination phases, the boost

converter functions as a current-limited voltage source

and regulates V

SYS

to V

PCHG

+400mV. The battery is

charged through an internal linear charging path with a

maximum precharge current of 500mA (subject to thermal

limitations), programmable through I

C. The precharge/

fast-charge thresholds can be configured through register

0x1E and may not be less than the V

OVP

(max).

Fast Charge

In the fast-charge phase, the boost converter functions

as a current source delivering current into the SYS node.

The SYS and BAT nodes are shorted together through the

BAT-SYS FET, with a nominal resistance of 13mΩ (typ).

The fast-charge current is set by an external resistor, but

may be modified by the T_T_IFchg[2:0] bits in registers

0x1A and 0x1B. The fast-charge current resistor can be

calculated as R

SET

= K

SET

FCHG

, where K

SET

has a

typical value of 10000A/A. The range of acceptable resis-

tors for R

SET

is 3.3kΩ to 100kΩ.

Charge Termination

During the charge termination phase, the battery current

is monitored across the BAT-SYS FET. To prevent a

†˜false’ termination of charge, the charge done condition is

qualified by the state of the input current limit; if the input

current limit is currently active, the charge done condi-

tion is not triggered. The charge done condition is also

debounced for 140 µs in order to prevent transient system

currents from triggering an incorrect done condition.

Thermistor Monitoring

The MAX14748 provides highly programmable thermal/

JEITA charge management. All thermal/JEITA charge

configuration parameters are set via the ThermCfg reg-

isters 0x1A - 0x1C. The charger is managed by thermal

information only if JEITACtrSet = 1.
The battery pack temperature is measured from a divider

formed by a pull-up resistor, an optional parallel resistor,

and the battery pack thermistor. When required, the pullup

resistor is connected to an internal supply through the

TPU input, and the voltage on the THM pin is compared to

an internal threshold. The supply voltage for the divider

is applied to the V

TPU

pin and may be connected to an

external supply or to V

CCINT

. The pullup resistor may

be complemented with an additional parallel resistor to

allow matching to different thermistor nominal values

and charging cutoff temperatures, T1, T2, T3, and T4.

There are two sets of cutoff temperatures optimized for

a thermistor with Beta = 3380 (0 °C/10 °C/45 °C/60 °C or

0 °C/10 °C/25 °C/45 °C) which can be selected as factory

default options. These cutoff temperatures divide the

temperature range into three zones, T1_T2, T2_T3, and

T3_T4. The charger is always turned off at temperatures

outside these zones when any thermal monitoring mode

is enabled. If the system needs to measure the THM

temperature when not charging, the internal pullup switch

may be enabled via the JeitaCfgR[1:0] bits.
Charging may be optionally disabled in the T1_T2 and

T3_T4 zones through the T_T_EnSet bits. The charge

current in each zone may be modified through T_T_

IFchg[2:0]. Battery-voltage termination reduction may also

be selectively applied through the T_T_VFset bits. See

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Weak Battery Operation

The MAX14748 supports the weak battery provision of

the USB 2.0 specification. If an SDP adapter is detected

and the battery voltage is less than the precharge threshold,

the input current limit is set to 500mA and a 2-minute

timer starts. After the 2-minute timer expires, the input

current limit is set to zero. Any time during the 2-minute

countdown, the system may turn off the weak battery

state machine and assert control of the input current limit

by setting WeakBatEn to 0.

Battery Detection

The MAX14748 offers battery detection by detecting the presence

of the battery thermistor. If the thermistor is not present, THM

is pulled high by the external pullup resistor, and BatDet is set

to 0 indicating that the battery is not connected.

Integrated USB 2.0 Analog Switch

A high-speed USB switch is integrated to provide the

host data access to the connected USB device when an

SDP or CDP port is detected. The analog switch may

be controlled manually or automatically by configuring

the AnSwCntl[1:0] bits in register 0x2F. When the ana-

log switch control is set to the auto control setting then

the CDN/CDP pins are connected to TDN/TDP only

when a SDP or CDP port is detected. (See

for further details.)

SFOUT LDO

The SFOUT LDO is powered directly from the CHGIN

input and may be used to power a USB transceiver, or

as an indicator signal that a SDP/CDP port is present.

The LDO will operate with CHGIN voltages greater than

BDET

. The output voltage of SFOUT is selectable as

either 5V or 3.3V through the SfOutLvl bit, depending on

the system preference. SFOUT may be programmed to

turn on automatically when an SDP or CDP is detected,

or placed in manual mode and turned on through an I

command. This supply is always available when CHGIN

is present.

Internal Supplies and Regulators

The MAX14748 has two internal power supplies: V

CCINT

and BREG. V

CCINT

and BREG are always present when

CHGIN or BAT is present. These supplies share a common

source, but bypassed separately. The V

CCINT

and BREG

supplies require external bypass capacitors and are

regulated to a nominal value of 4.3V (typ).

Figure 6. Thermistor Monitoring

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

TEMPERATURE ( ºC)

CHARGING

PCHG

PREQUAL:

BAT

PCHG

TEMPERATURE ( ºC)

CHARGING

T1T2IFchg[2:0]

FAST CHARGE CONSTANT CURRENT:

PCHG

< V

BAT

< V

BATREG

T2T3IFchg[2:0]

TEMPERATURE ( ºC)

CHARGING

BATREG

REGULATED VOLTAGE

CHARGING

TEMPERATURE ( ºC)

CHARGING

BATREG

REGULATED VOLTAGE

CHARGING

BATREG

- 300mV

T3T4IFchg[2:0]

T1T2ENset =1, T3T4ENset = 1
T1T2VFset = 1, T3T4VFset = 1

T1T2ENset =1, T3T4ENset = 1
T1T2VFset = 0, T3T4VFset = 0

BATREG

- 300mV

Device Control Interface

While the MAX14748 is primarily controlled by I

C, GPIO

control is also offered for specific functions. The following

GPIO control signals are provided (note that these signals

only apply when CHGIN is present):
1) FSUS (Input): Force Suspend. This pin enables the

host microcontroller to force the input current limit to

zero. When CHGIN is present, a logic-high on the pin

causes the input OVP FET at CHGIN to open and the

input current to MAX14748 is reduced to less than

2mA. This pin has no effect if FSUSMsk = 1.

2) FLTIN (Input): Battery Fault Input. This pin allows

the system or battery pack to place the charger into

a fault condition using a GPIO pin. See Register

0x35 description for more details.

3) CDIR (Open-Drain Output): USB Superspeed MUX

control. In USB Type-C plug configurations, it is

necessary to detect the orientation of the connector

and route the Superspeed lines accordingly. The pin

can be used to automatically configure a USB Super-

speed MUX according to the orientation information

contained in the integrated Type-C detection block.

(This information is also available through I

C) The

CDIR output is pulled to GND when the CC1 pin is

active on the Type-C connector, otherwise it is high-

impedance.

4) SYSOK (Open-Drain Output): With CHGIN present,

the SYSOK output is asserted if the boost regulator

generates a V

SYS

greater than SYS UVLO threshold,

SYSUVLO

. Otherwise, the output is high-impedance.

This pin can be used as wake up the host system

from a dead-battery. Note that when V

SYS

falls

below the SYS UVLO falling threshold, the input

OVP switch is opened as the boost converter cannot

operate in this state.

5) BVCEN (Open-Drain Output): When CHGIN is

present and a Type-C device that requires V

CONN

found, this pin is asserted. This pin should be con-

nected to the enable pin of the V

CONN

power supply

enable. The output of BVCEN is push-pull between

GND and V

CCINT

System Faults

The MAX14748 monitors the system for faults including

OVP Soft Start Timeout, SYS UVLO, Direct Charging

Fault, Charger TImeout, Forced Charger Fault, Dead

Battery, CHGIN OVP.

for more details.

Table 1b. System Faults Summary

FAULT NAME

EFFECT

CAUSE DESCRIPTION

HOW TO RECOVER

STAUS BIT

OVP Soft-Start

TimeOut

System Fault Condition Latched.

OVP/Boost/Charger Off

UFP: V

BYP

is not within

50mV of V

CHGIN

at Soft Start

TimeOut (100ms typ)

Unplug/Replug Type-C

cable or reset device via

USBCRSet of Reg 0x30

SysFlt

(Reg 0x02)

SYS UVLO

System Fault Condition Latched.

OVP/Boost/Charger Off

UFP: V

SYS

falls below SYS

UVLO threshold while in Boost

mode or V

SYS

fails to reach

above SYS UVLO threshold

within 20ms after V

BYP

rises

Unplug/Replug Type-C

cable or resert device via

USBCRSet of Reg 0x30

SysFlt

(Reg 0x02)

Direct

Charging Fault

Charger Fault Condition

Latched. Charger Off

UFP: V

BAT

falls below V

PCHG

while in Fast Charge mode

Cycle ChgEn or treat as

System Fault

DirChgFault

(Reg 0x05)

Charger

Timeout

Charger Fault Condition

Latched. Charger Off

UFP: Pre-charge or Fast-

charge Timer expires

Cycle ChgEn or treat as

System Fault

ChgStat[3:0]

(Reg 0x05)

Forced

Charger Fault

Charger Off

UFP: Logic-low applied on

FLTIN pin

Logic-high applied on

FLTIN pin

ChgStat[3:0]

(Reg 0x05)

Dead Battery

System Fault Condition Latched.

OVP/Boost/Charger Off

UFP: DeadBattery detection

enabled and SDP detected:

BAT

fails to reach above

PCHG

within 2min

Treat as System Fault or

disable DeadBattery

WbChg

(Reg 0x02)

CHGIN OVP

OVP/Boost/Charger OFF

CHGIN

rises above V

OVP

Reduce V

CHGIN

below

OVP_F

ChginOVP

(Reg 0x02)

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

C Interface

The MAX14748 contain an I

C-compatible interface for

data communication with a host controller (SCL and

SDA). The interface supports a clock frequency of up to

400kHz. SCL and SDA require pullup resistors that are

connected to a positive supply.

Start, Stop, And Repeated Start Conditions

When writing to the MAX14748 using I

C, the master

sends a START condition (S) followed by the MAX14748

C address. After the address, the master sends the

The master then ends communication by issuing a

STOP condition (P) to relinquish control of the bus, or

a REPEATED START condition (Sr) to communicate to

another I

C slave. See

Slave Address

Set the Read/Write bit high to configure the MAX14748

to read mode (

Set the Read/Write bit low to

configure the MAX14748 to write mode. The address is

the first byte of information sent to the MAX14748 after

the START condition.

Bit Transfer

One data bit is transferred on the rising edge of each SCL

clock cycle. The data on SDA must remain stable during

the high period of the SCL clock pulse. Changes in SDA

while SCL is high and stable are considered control sig-

nals (see the

section). Both SDA and SCL remain high when the bus is

not active.

Single-Byte Write

In this operation, the master sends an address and two

data bytes to the slave device (

following

procedure describes the single byte write operation:
1) The master sends a START condition
2) The master sends the 7-bit slave address plus a

write bit (low)

3)  The addressed slave asserts an ACK on the data line
4)  The master sends the 8-bit register address
5)  The slave asserts an ACK on the data line only if the

address is valid (NAK if not)

6)  The master sends 8 data bits
7)  The slave asserts an ACK on the data line
8)  The master generates a STOP condition

Table 2. I

C Slave Addresses

Figure 7. I

C START, STOP and REPEATED START Conditions

Figure 8. Write Byte Sequence

ADDRESS FORMAT

HEX

BINARY

7-Bit Slave ID

0x0A

0001010

Write Address

0x14

00010100

Read Address

0x15

00010101

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

SCL

SDA

DEVICE SLAVE ADDRESS - W A

8 DATA BITS

WRITE SINGLE BYTE

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

Burst Write

In this operation, the master sends an address and mul-

tiple data bytes to the slave device (

The slave

device automatically increments the register address after

each data byte is sent. The following procedure describes

the burst write operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a

write bit (low).

3)  The addressed slave asserts an ACK on the data line.
4)  The master sends the 8-bit register address.
5)  The slave asserts an ACK on the data line only if the

address is valid (NAK if not).

6)  The master sends eight data bits.
7)  The slave asserts an ACK on the data line.
8)  Repeat 6 and 7 N-1 times.
9)  The master generates a STOP condition.

Single-Byte Read

In this operation, the master sends an address plus two

data bytes and receives one data byte from the slave

device (

The following procedure describes the

single byte read operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a

write bit (low).

3)  The addressed slave asserts an ACK on the data line.
4)  The master sends the 8-bit register address.
5)  The slave asserts an ACK on the data line only if the

address is valid (NAK if not).

6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave address plus a

read bit (high).

8)  The addressed slave asserts an ACK on the data line.
9)  The slave sends eight data bits.
10)  The master asserts a NACK on the data line.
11)  The master generates a STOP condition.

Figure 9. Burst Write Sequence

Figure 10. Read Byte Sequence

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

DEVICE SLAVE ADDRESS - W A

8 DATA BITS - 1

BURST WRITE

8 DATA BITS - N

8 DATA BITS - 2

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

DEVICE SLAVE ADDRESS - W A

DEVICE SLAVE ADDRESS - R

READ SINGLE BYTE

8 DATA BITS

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

Burst Read

In this operation, the master sends an address plus two

data bytes and receives multiple data bytes from the slave

device (

The following procedure describes the

burst byte read operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a

write bit (low).

3)  The addressed slave asserts an ACK on the data line.
4)  The master sends the 8-bit register address.
5)  The slave asserts an ACK on the data line only if the

address is valid (NAK if not).

6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave address plus a

read bit (high).

8) The slave asserts an ACK on the data line.

9)  The slave sends eight data bits.
10)  The master asserts an ACK on the data line.
11)  Repeat 9 and 10 N-2 times.
12)  The slave sends the last eight data bits.
13)  The master asserts a NACK on the data line.
14)  The master generates a STOP condition.

Acknowledge Bits

Data transfers are acknowledged with an acknowledge bit

(ACK) or a not-acknowledge bit (NACK). Both the master

and the MAX14748 generate ACK bits. To generate an

ACK, pull SDA low before the rising edge of the ninth

clock pulse and hold it low during the high period of the

ninth clock

To generate a NACK,

leave SDA high before the rising edge of the ninth clock

pulse and leave it high for the duration of the ninth clock

pulse. Monitoring for NACK bits allows for detection of

unsuccessful data transfers.

Figure 11. Burst Read Sequence

Figure 12. Acknowledge

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

DEVICE SLAVE ADDRESS - W A

DEVICE SLAVE ADDRESS - R

BURST READ

8 DATA BITS - 1

8 DATA BITS - 3

8 DATA BITS - 2

8 DATA BITS - N

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

NOT ACKNOWLEDGE

ACKNOWLEDGE

SDA

SCL

Table 3. I2C Register Map

REGISTER

ADDRESS

REGISTER

NAME

R/W

0x00

ChipID

ChipId[7:0]

0x01

ChipRev

ChipRevH[3:0]

ChipRevL[3:0]

0x02

DevStatus1

SysFlt

ChgInOVP

ILim

VSysReg

ThrmSd150

ThrmSd120

BatDet

WbChg

0x03

AICLStatus

AICLStatus[2:0]

AICLCurSet[4:0]

0x04

DevStatus2

BattPREQB

BattUVLOB

BypUVLO

SysUVLOB

DCDCILim

DCDCRunA

way

DCDCPGood

0x05

ChgStatus

DirChgFault

LowPow

ChgStat[3:0]

0x06

JEIT

AStatus

ChgThrmRegCur

ChgThrmRegVlt

ChgThrmStat[2:0]

0x07

BCStatus

VBUSDet

ChgT

ypRun

PrChgT

yp[2:0]

DCDTmo

ChgT

yp[1:0]

0x08

Reserved

0x09

CCStatus1

CCPinStat[1:0]

CCIStat[1:0]

CCVcnStat

CCStat[2:0]

0x0A

CCStatus2

VSAFE0V

DetAbrt

0x0B

DevInt1

COR

SysFltI

ChgInOVPI

ILimI

VSysRegI

ThrmSd150I

ThrmSd120I

BatDetI

WbChgI

0x0C

AICLInt

COR

AICLI

0x0D

DevInt2

COR

BattPREQi

BattUVLOI

BypUVLOI

SysUVLOI

DCDCPGoodI

0x0E

ChgInt

COR

DirChgFaultI

LowPowRI

LowPowFI

ChgStatI

0x0F

JEIT

AInt

COR

ChgThrmRegCurI

ChgThrmRegVltI

ChgThrmStatI

0x10

BCInt

COR

VBUSDetI

ChgT

ypRunFI

ChgT

ypRunRI

PrChgT

ypI

DCDTmoI

ChgT

ypI

0x1

CCInt

COR

VSAFE0VI

DetAbrtI

CCPinStatI

CCIStatI

CCVcnStatI

CCStatI

0x12

DevInt1Mask

R/W

SysFltIM

ChgInOVPIM

ILimIM

VSysRegIM

ThrmSd150IM

ThrmSd120IM

BatDetIM

WbChgIM

0x13

AICLIntMask

R/W

AICLIM

0x14

DevInt2Mask

R/W

BattPREQIM

BattUVLOIM

BypUVLOIM

SysUVLOIM

DCDCILimIM

DCDCRunA

wayIM

DCDCPGoodIM

0x15

ChgIntMask

R/W

DirChgFaultIM

LowPowRIM

LowPowFIM

ChgStatIM

0x16

JEIT

AIntMask

R/W

ChgThrmReg

CurIM

ChgThrmReg

VltIM

ChgThrmStatIM

0x17

BCIntMask

R/W

VBUSDetIM

ChgT

ypRunFIM

ChgT

ypRunRIM

PrChgT

ypIM

DCDTmoIM

ChgT

ypIM

0x18

CCIntMask

R/W

VSAFE0VIM

DetAbrtIM

CCPinStatIM

CCIStatIM

CCVcnStatIM

CCStatIM

0x19

LED_CTRL

R/W

LEDCtrl

LEDManual

0x1A

ThermaCfg1

R/W

T1T2IFchg[2:0]

T2T3IFchg[2:0]

JeitaCfgR[1:0]

0x1B

ThermaCfg2

R/W

T3T4IFchg[2:0]

T3T4ENset

T1T2ENset

T3T4VFset

T1T2VFset

0x1C

ThermaCfg3

R/W

JEIT

ACtrSet

armCoolSel*

0x1D

ChargerCtrl1

R/W**

ChgAutoStp

BatReChg[1:0]

BatReg[1:0]

ChgEn

0x1E

ChargerCtrl2

R/W**

VPchg[2:0]

IPChg[1:0]

ChgDone[1:0]

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table

I2C

Register

Map

(continued)

Note :

COR = Clear-o

n-read

* Read Only

** Read

Only if W

riteProtect is enabled

(See

Reserved bits must not be modified from their default states to ensure proper operation.

REGISTER

ADDRESS

REGISTER

NAME

R/W

0x1F

ChargerCtrl3

R/W**

ChgAutoSta

MtChgTmr[1:0]

FChgTmr[1:0]

PChgTmr[1:0]

0x20

ChargerCtrl4

R/W**

eakBatStat[2:0]*

eakBatEn

0x21

CurLimCtrl

R/W

CurLim1Frc

FSUSMsk

CurLim1Set[4:0]

0x22

CurLimStatus

CurLim2Rb[2:0]

SpvChgILim[4:0]

0x23

BBCFG1

R/W**

BoostRComp[3:0]

0x24

BBCFG2

R/W**

BBFrcZX

BuckVSet[3:0]

0x25

BCCtrl1

R/W

DCD2s

SfOutLvl

ADC3PDet

SfOutCtrl[1:0]

ChgDetMan

ChgDetEn

0x26

Reserved

0x27

CCCtrl1

R/W

CCSnkSrc

CCDbgEn

CCAudEn

CCDetEn

0x28

CCCtrl2

R/W

CCForceError

SnkAttached

Lock

CCSnkSrcSwp

CCSrcSnkSwp

CCVcnSwp

CCVcnEn

CCSrcRst

CCSnkRst

0x29

CCCtrl3

R/W

CCT

rySnk

CCPreferSnk

CCDRPPhase[1]

CCDRPPhase[0]

0x2A

CHGINILim1

CHGINILim[6:0]

0x2B

CHGINILim2

R/W

CHGINILimGate

SDPMaxCur[1:0]

CDPMaxCur

0x2C

AICLCFG1

R/W

AICLEn

AICLAbort

0x2D

AICLCFG2

R/W

BYPUVLO[2:0]

AICLMaxI[4:0]

0x2E

AICLCFG3

R/W

BYPDeb

AICL

TBlk[1:0]

AICL

TStep[1:0]

0x2F

DPDNSw

R/W

AnSwCntl[1:0]

0x30

Others

R/W

USBCRset

0x31

Reserved

0x32

Reserved

0x33

LowPow

R/W

LowPowEn

LowPowAbort

0x34

Reserved

0x35

TSel

R/W

TSelect[1:0]

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 4. ChipID Register (0x00)

Table 5. ChipRev Register (0x01)

Table 6. DevStatus1 Register (0x02)

ADDRESS:

0x00

MODE:

Read Only

BIT

NAME

ChipId[7:0]

ChipId[7:0]

ChipId[7:0] bits show information about the version of the MAX14748.

ADDRESS:

0x01

MODE:

Read Only

BIT

NAME

ChipRevH[3:0]

ChipRevL[3:0]

ChipRevH[3:0] ChipRevH[3:0] bits show information about the revision of the MAX14748 silicon.
ChipRevL[3:0]

ChipRevL[3:0] bits show information about the revision of the MAX14748 silicon.

ADDRESS:

0x02

MODE:

Read Only

BIT

NAME

SysFlt

ChgInOVP

ILim

VSysReg

ThrmSd150

ThrmSd120

BatDet

WbChg

SysFlt

System Fault

0 = System voltage is normal

1 = SYS voltage below SYS UVLO Threshold and the condition latched.

ChgInOVP

CHGIN Overvoltage Protection Flag

0 = CHGIN OVP not active

1 = CHGIN OVP active

ILim

Input Current Limiting

0 = CHGIN input current within limit

1 = CHGIN input in current limit

VSysReg

SYS Regulation (SYSOK)

0 = SYS voltage above SYS UVLO threshold and boost regulating SYS

1 = SYS voltage below SYS UVLO threshold or Boost not regulating SYS

ThrmSd150

Thermal shutdown

0 = Device in normal operation Mode

1 = Device in thermal shutdown (T

DIE

> 150 °C)

ThrmSd120

Thermal Warm

0 = Device in normal operation Mode

1 = 120 °C < T

DIE

< 150 °C

BatDet

Status of Battery Detection

0 = No battery detected

1 = Battery detected

WbChg

Weak Battery Charging

0 = Weak Battery Charge Timer expired or not running

1 = Weak Battery Charge Timer running

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

C Register Descriptions

Table 7. AICLStatus Register (0x03)

Table 8. DevStatus2 Register (0x04)

ADDRESS:

0x03

MODE:

Read Only

BIT

NAME

AICLStatus[2:0]

AICLCurSet[4:0]

AICLStatus[2:0]

AICL Status

000 = AICL Off

001 = AICL Precheck

010 = AICL Increment

011 = AICL Blank

100 = AICL Idle

101 = AICL No Connection

AICLCurSet[4:0]

Current limit set by AICL (if active)

0 = 100mA

1 = 200mA

†¦

30 = 3.1A

31 = 3.2A

ADDRESS:

0x04

MODE:

Read Only

BIT

NAME

BattPREQB BattUVLOB BypUVLO

SysUVLOB

DCDCILim

DCDCRunAway

DCDCPGood

BattPREQB

BAT

vs. V

PCHG

programmable from 5.7V to 6.4V, BattPreqB status is NOT valid while the Weak

Battery 2min timer is running.)

0 = V

BAT

below V

PCHG

threshold

1 = V

BAT

above V

PCHG

threshold

BattUVLOB

BAT

vs. V

BATUVLO

(BattUVLOB status is only valid in boost mode with CHGIN present.)

0 = V

BAT

below V

BATUVLO

threshold

1 = V

BAT

above V

BATUVLO

threshold

BypUVLO

BYP

vs. V

BYPUVLO

programmable from 3.8V to 4.5V)

0 = V

BYP

above V

BYPUVLO

theshold

1 = V

BYP

below V

BYPUVLO

theshold

SysUVLOB

SYS

vs. V

SYSUVLO

programmable from 6.1V to 6.8V, SysUVLOB status is only valid in boost

mode with CHGIN present))

0 = V

SYS

below V

SYSUVLO

threshold

1 = V

SYS

above V

SYSUVLO

threshold

DCDCILim

Reverse Buck Converter Current Limit Status

0 = Normal Operation

1 = Buck current limit has been reached

DCDCRunAway

Reverse Buck Converter Runaway Status

0 = Normal Operation

1 = Buck runaway is asserted

DCDCPGood

Reverse Buck Converter Regulation Status

0 = Buck regulated value below 82% of the target value

1 = Normal operation

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 9. ChgStatus Register (0x05)

Table 10. JEITAStatus Register (0x06)

ADDRESS:

0x05

MODE:

Read Only

BIT

NAME

DirChgFault

LowPow

ChgStat[3:0]

DirChgFault

Direct charging fault

0 = Device in normal operation

1 = V

BAT

drops below V

PCHG

when battery is in supplement mode.

LowPow

Low Power Mode

0 = Not In Low Power Mode

1 = In Low Power Mode

ChgStat[3:0]

Status of Charger Mode

0000 = Charger off

0001 = Charging suspended due to temperature (see state diagram)

0010 = Pre-charge in progress

0011 = Fast-charge, constant current mode in progress

0100 = Fast-charge, constant voltage mode in progress

0101 = Maintain charge in progress

0110 = Maintain charge done

0111 = Charger fault condition (see state diagram)

1000 = Battery Fault Suspend (see state diagram)

ADDRESS:

0x06

MODE:

Read Only

BIT

NAME

ChgThrmRegCur

ChgThrmRegVlt

ChgThrmStat[2:0]

ChgThrmRegCur

FastCharge Current reduced due to JEITA status

0 = Not changed

1 = Reduced

ChgThrmRegVlt

Battery Regulation Voltage reduced due to JEITA status

0 = Not Changed

1 = Reduced

ChgThrmStat[2:0]

Thermistor Monitor

000 = T < T1

001 = T1 < T < T2

010 = T2 < T < T3

011 = T3 < T < T4

100 = T > T4

101 = No thermistor detected (THM high due to external pullup). Note: If a parallel resistor is used for

thermistor monitoring, this mode may not function properly.

110 = NTC input disabled through ThermEn.

111 = Detection disabled due to CHGIN not present.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 11. BCStatus Register (0x07)

Table 12. Reserved Register (0x08)

ADDRESS:

0x09

MODE:

Read Only

BIT

NAME

VBUSDet

ChgTypRun

PrChgTyp[2:0]

DCDTmo

ChgTyp[1:0]

VBUSDet

Status of CHGIN Detection

0 = V

CHGIN

< V

BDET

1 = V

CHGIN

> V

BDET

ChgTypRun

Charger Detection Running Status

0 = Not Running

1 = Running

PrChgTyp[2:0]

Output of Proprietary Charger Detection

000 = Unknown

001 = Samsung 2A

010 = Apple 0.5A

011 = Apple 1A

100 = Apple 2A

101 = Apple 12W

110 = 3A DCP (If enabled)

111 = RFU

DCDTmo

DCD Time Out. DCD detection timed out during charger detection, indicating D+/D- are open. BC1.2 detection

continues as required by BC1.2, but SDP most likely is found.

0 = No Timeout or detection not run

1 = DCD Timeout occurred

ChgTyp[1:0]

Output of Charger Detection

00 = Nothing attached

01 = SDP, USB Cable attached

10 = CDP, Charging Downstream Port (current depends on USB operating speed)

11 = DCP, Dedicated Charger (current up to 1.5A)

ADDRESS:

0x08

MODE:

Read Only

BIT

NAME

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 13. CCStatus1 Register (0x09)

Table 14. CCStatus2 Register (0x0A)

ADDRESS:

0x09

MODE:

Read Only

BIT

NAME

CCPinStat[1:0]

CCIStat

CCVcnStat

CCStat[2:0]

CCPinStat[1:0]

Status of Active CC Pin

00 = No Determination

01 = CC1 Active

10 = CC2 Active

11 = RFU

CCIStat

CC Pin Detected Allowed VBUS Current in UFP mode

00 = Not in UFP mode

01 = 500mA

10 = 1.5A

11 = 3.0A

CCVcnStat

Status of VCONN Output

0 = VCONN Disabled

1 = VCONN Enabled

CCStat[2:0]

Output of CC Pin Detection State Machine

000 = No Connection

001 = UFP

010 = DFP

011 = Audio Accessory

100 = Debug Accessory

101 = Error

110 = Disabled

111 = RFU

ADDRESS:

0x0A

MODE:

Read Only

BIT

NAME

VSAFE0V

DetAbrt

VSAFE0V

Status of VBUS Detection. (Valid only in Attached.SRC_CCx, Attached.SNK_CCx state)

0 = V

CHGIN

< VSAFE0V

1 = V

CHGIN

> VSAFE0V

DetAbrt

Charger Detection Abort

0 = Charger Detection runs if ChgDetEn = 1 and VBUS is valid for the debounce time

1 = Charger Detection is aborted by Type-C State Machine. Charger detection will run if ChgDetEn = 1 and

VBUS is valid for the debounce time. ChgDetMan bit allows manual run of charger detection. If Charger

Detection is in progress, DetAbrt = 1 immediately stops the in-progress detection.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 15. DevInt1 Register (0x0B)

Table 16. AICLInt Register (0x0C)

ADDRESS:

0x0B

MODE:

Clear On Read

BIT

NAME

SysFltI

ChgInOVPI

ILimI

VSysRegI

ThrmSd150I

ThrmSd120I

BatDetI

WbChgI

SysFltI

SysFlt status change interrupt.

0 = Status of SysFlt has NOT changed since the last time SysFltI was read

1 = Status of SysFlt has changed since the last time SysFltI was read

ChgInOVPI

ChgInOVP status change interrupt.

0 = Status of ChgInOVP has NOT changed since the last time ChgInOVPI was read

1 = Status of ChgInOVP has changed since the last time ChgInOVPI was read

ILimI

ILim status change interrupt.

0 = Status of ILim has NOT changed since the last time ILimI was read

1 = Status of ILim has changed since the last time ILimI was read

VSysRegI

VSysReg status change interrupt.

0 = Status of VSysReg has NOT changed since the last time VSysRegI was read

1 = Status of VSysReg has changed since the last time VSysRegI was read

ThrmSd150I

ThrmSd150 status change interrupt.

0 = Status of ThrmSd150 has NOT changed since the last time ThrmSd150I was read

1 = Status of ThrmSd150 has changed since the last time ThrmSd150I was read

ThrmSd120I

ThrmSd120 status change interrupt.

0 = Status of ThrmSd120 has NOT changed since the last time ThrmSd120I was read

1 = Status of ThrmSd120 has changed since the last time ThrmSd120I was read

BatDetI

BatDet status change interrupt.

0 = Status of BatDet has NOT changed since the last time BatDetI was read

1 = Status of BatDet has changed since the last time BatDetI was read

WbChgI

WbChg status change interrupt.

0 = Status of WbChg has NOT changed since the last time WbChgI was read

1 = Status of WbChg has changed since the last time WbChgI was read

ADDRESS:

0x0C

MODE:

Clear On Read

BIT

NAME

AICLI

AICLI

AICLStatus status change interrupt.

0 = Status of AICLStatus has NOT changed since the last time AICLI was read

1 = Status of AICLStatus has changed since the last time AICLI was read

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 17. DevInt2 Register (0x0D)

Table 18. ChgInt Register (0x0E)

ADDRESS:

0x0D

MODE:

Clear On Read

BIT

NAME

BattPREQI BattUVLOI BypUVLOI SysUVLOI DCDCILimI DCDCRunAwayI DCDCPGoodI

BattPREQI

BattPREQ status change interrupt.

0 = Status of BattPREQ has NOT changed since the last time BattPREQI was read

1 = Status of BattPREQ has changed since the last time BattPREQI was read

BattUVLOI

BattUVLO status change interrupt.

0 = Status of BattUVLO has NOT changed since the last time BattUVLOI was read

1 = Status of BattUVLO has changed since the last time BattUVLOI was read

BypUVLOI

BypUVLO status change interrupt.

0 = Status of BypUVLO has NOT changed since the last time BypUVLOI was read

1 = Status of BypUVLO has changed since the last time BypUVLOI was read

SysUVLOI

SysUVLO status change interrupt.

0 = Status of SysUVLO has NOT changed since the last time SysUVLOI was read

1 = Status of SysUVLO has changed since the last time SysUVLOI was read

DCDCILimI

DCDCILim status change interrupt.

0 = Status of DCDCILim has NOT changed since the last time DCDCILim was read

1 = Status of DCDCILim has changed since the last time DCDCILim was read

DCDCRunAwayI

DCDCRunAway status change interrupt.

0 = Status of DCDCRunAway has NOT changed since the last time DCDCRunAway was read

1 = Status of DCDCRunAway has changed since the last time DCDCRunAway was read

DCDCPGoodI

DCDCPGood status change interrupt.

0 = Status of DCDCPGood has NOT changed since the last time DCDCPGoodI was read

1 = Status of DCDCPGood has changed since the last time DCDCPGoodI was read

ADDRESS:

0x0E

MODE:

Clear On Read

BIT

NAME

DirChgFaultI

LowPowRI

LowPowFI

ChgStatI

DirChgFaultI

DirChgFault status change interrupt.

0 = Status of DirChgFault has NOT changed since the last time DirChgFaultI was read

1 = Status of DirChgFault has changed since the last time DirChgFaultI was read

LowPowRI

LowPow Rising Edge interrupt.

0 = LowPow bit rise edge has NOT occurred since the last time LowPowRI was read

1 = LowPow bit rise edge has occurred since the last time LowPowRI was read

LowPowFI

LowPow Falling Edge interrupt.

0 = LowPow bit falling edge has NOT occurred since the last time LowPowFI was read

1 = LowPow bit falling edge has occurred since the last time LowPowFI was read

ChgStatI

ChgStat[3:0] status change interrupt.

0 = Status of ChgStat[3:0] has NOT changed since the last time ChgStatI was read

1 = Status of ChgStat[3:0] has changed since the last time ChgStatI was read

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 19. JEITAInt Register (0x0F)

Table 20. BCInt Register (0x10)

ADDRESS:

0x0F

MODE:

Clear On Read

BIT

NAME

ChgThrmRegCurI

ChgThrmRegVltI

ChgThrmI

ChgThrmRegCurI

ChgThrmRegCur status change interrupt.

0 = Status of ChgThrmRegCur has NOT changed since the last time ChgThrmRegCurI was read

1 = Status of ChgThrmRegCur has changed since the last time ChgThrmRegCurI was read

ChgThrmRegVltI

ChgThrmRegVlt status change interrupt.

0 = Status of ChgThrmRegVlt has NOT changed since the last time ChgThrmRegVltI was read

1 = Status of ChgThrmRegVlt has changed since the last time ChgThrmRegVltI was read

ChgThrmStatI

ChgThrmStat[2:0] status change interrupt.

0 = Status of ChgThrmStat[2:0] has NOT changed since the last time ChgThrmStatI was read

1 = Status of ChgThrmStat[2:0] has changed since the last time ChgThrmStatI was read

ADDRESS:

0x10

MODE:

Clear On Read

BIT

NAME

VBUSDetI

ChgTypRunFI

ChgTypRunRI

PrChgTypI

DCDTmoI

ChgTypI

VBUSDetI

VBUSDet status change interrupt.

0 = Status of VBUSDet has NOT changed since the last time VBUSDetI was read

1 = Status of VBUSDet has changed since the last time VBUSDetI was read

ChgTypRunFI

ChgTypRun Falling Edge interrupt.

0 = ChgTypRun bit falling edge has NOT occurred since the last time ChgTypRunFI was read

1 = ChgTypRun bit falling edge has occurred since the last time ChgTypRunFI was read

ChgTypRunRI

ChgTypRun Rising Edge interrupt.

0 = ChgTypRun bit rising edge has NOT occurred since the last time ChgTypRunRI was read

1 = ChgTypRun bit rising edge has occurred since the last time ChgTypRunRI was read

PrChgTypI

PrChgTyp status change interrupt.

0 = Status of PrChgTyp has NOT changed since the last time PrChgTypI was read

1 = Status of PrChgTyp has changed since the last time PrChgTypI was read

DCDTmoI

DCDTmo status change interrupt.

0 = Status of DCDTmo has NOT changed since the last time DCDTmoI was read

1 = Status of DCDTmo has changed since the last time DCDTmoI was read

ChgTypI

ChgTyp status change interrupt.

0 = Status of ChgTyp has NOT changed since the last time ChgTypI was read

1 = Status of ChgTyp has changed since the last time ChgTypI was read

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 21. CCInt Register (0x11)

ADDRESS:

0x11

MODE:

Clear On Read

BIT

NAME

VSAFE0VI

DetAbrtI

CCPinStatI

CCIStatI

CCVcnStatI

CCStatI

VSAFE0VI

VSAFE0V status change interrupt.

0 = Status of VSAFE0V has NOT changed since the last time VSAFE0VI was read

1 = Status of VSAFE0V has changed since the last time VSAFE0VI was read

DetAbrtI

DetAbrt status change interrupt.

0 = Status of DetAbrt has NOT changed since the last time DetAbrtI was read

1 = Status of DetAbrt has changed since the last time DetAbrtI was read

CCPinStatI

CCPinStat status change interrupt.

0 = Status of CCPinStat has NOT changed since the last time CCPinStatI was read

1 = Status of CCPinStat has changed since the last time CCPinStatI was read

CCIStatI

CCIStat status change interrupt.

0 = Status of CCIStat has NOT changed since the last time CCIStatI was read

1 = Status of CCIStat has changed since the last time CCIStatI was read

CCVcnStatI

CCVcnStat status change interrupt.

0 = Status of CCVcnStat has NOT changed since the last time CCVcnStatI was read

1 = Status of CCVcnStat has changed since the last time CCVcnStatI was read

CCStatI

CCStat status change interrupt.

0 = Status of CCStat has NOT changed since the last time CCStatI was read

1 = Status of CCStat has changed since the last time CCStatI was read

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 22. DevInt1Mask Register (0x12)

Table 23. AICLIntMask Register (0x13)

ADDRESS:

0x12

MODE:

Read/Write

BIT

NAME

SysFltIM

ChgInOVPIM

ILimIM

VSysRegIM ThrmSd150IM ThrmSd120IM BatDetIM

WbChgIM

SysFltIM

SysFltI Interrupt Mask

1 = Mask

0 = Unmask

ChgInOVPIM

ChgInOVPI Interrupt Mask

1 = Mask

0 = Unmask

ILimIM

ILimI Interrupt Mask

1 = Mask

0 = Unmask

VSysRegIM

VSysRegI Interrupt Mask

1 = Mask

0 = Unmask

ThrmSd150IM

ThrmSd150I Interrupt Mask

1 = Mask

0 = Unmask

ThrmSd120IM

ThrmSd120I Interrupt Mask

1 = Mask

0 = Unmask

BatDetIM

BatDetI Interrupt Mask

1 = Mask

0 = Unmask

WbChgIM

WbChgI Interrupt Mask

1 = Mask

0 = Unmask

ADDRESS:

0x13

MODE:

Read/Write

BIT

NAME

AICLIM

AICLIM

AICLI Interrupt Mask

1 = Mask

0 = Unmask

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Maxim Integrated •”‚

Table 24. DevInt2Mask Register (0x14)

Table 25. ChgIntMask Register (0x15)

ADDRESS:

0x14

MODE:

Read/Write

BIT

NAME

BattPREQIM BattUVLOIM BypUVLOIM SysUVLOIM DCDCILimIM DCDCRunAwayIM DCDCPGoodIM

BattPREQIM

BattPREQI Interrupt Mask

1 = Mask

0 = Unmask

BattUVLOIM

BattUVLOI Interrupt Mask

1 = Mask

0 = Unmask

BypUVLOIM

BypUVLOI Interrupt Mask

1 = Mask

0 = Unmask

SysUVLOIM

SysUVLOI Interrupt Mask

1 = Mask

0 = Unmask

DCDCILimIM

DCDCILimI Interrupt Mask

1 = Mask

0 = Unmask

DCDCRunAwayIM

DCDCRunAwayI Interrupt Mask

1 = Mask

0 = Unmask

DCDCPGoodIM

DCDCPGoodI Interrupt Mask

1 = Mask

0 = Unmask

ADDRESS:

0x15

MODE:

Read/Write

BIT

NAME

DirChgFaultIM

LowPowRIM

LowPowFIM

ChgStatIM

DirChgFaultIM

DirChgFaultI Interrupt Mask

1 = Mask

0 = Unmask

LowPowRIM

LowPowRI Interrupt Mask

1 = Mask

0 = Unmask

LowPowFIM

LowPowFI Interrupt Mask

1 = Mask

0 = Unmask

ChgStatIM

ChgStatI Interrupt Mask

1 = Mask

0 = Unmask

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Maxim Integrated •”‚

Table 26. JEITAIntMask Register (0x16)

Table 27. BCIntMask Register (0x17)

ADDRESS:

0x16

MODE:

Read/Write

BIT

NAME

ChgThrmRegCurIM

ChgThrmRegVltIM

ChgThrmStatIM

ChgThrmRegCurIM

ChgThrmRegCurI Interrupt Mask

1 = Mask

0 = Unmask

ChgThrmRegVltIM

ChgTHrmRegVI Interrupt Mask

1 = Mask

0 = Unmask

ChgThrmIM

ChgThrmI Interrupt Mask

1 = Mask

0 = Unmask

ADDRESS:

0x17

MODE:

Read/Write

BIT

NAME

VBUSDetIM

ChgTypRunFIM

ChgTypRunRIM PrChgTypIM DCDTmoIM ChgTypIM

VBUSDetIM

VBUSDetI Interrupt Mask

1 = Mask

0 = Unmask

ChgTypRunFIM

ChgTypRunFI Interrupt Mask

1 = Mask

0 = Unmask

ChgTypRunRIM

ChgTypRunRI Interrupt Mask

1 = Mask

0 = Unmask

PrChgTypIM

PrChgTypeI Interrupt Mask

1 = Mask

0 = Unmask

DCDTmoIM

DCDTmrI Interrupt Mask

1 = Mask

0 = Unmask

ChgTypIM

ChgTypI Interrupt Mask

1 = Mask

0 = Unmask

MAX14748

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Maxim Integrated •”‚

Table 28. CCIntMask Register (0x18)

Table 29. LED_CTRL Register (0x19)

ADDRESS:

0x18

MODE:

Read/Write

BIT

NAME

VSAFE0VIM

DetAbrtIM

CCPinStatIM

CCIStatIM

CCVcnStatIM

CCStatIM

VSAFE0VIM

VSAFE0VI Interrupt Mask

1 = Mask

0 = Unmask

DetAbrtIM

DetAbrtI Interrupt Mask

1 = Mask

0 = Unmask

CCPinStatIM

CCPinStatI Interrupt Mask

1 = Mask

0 = Unmask

CCIStatIM

CCIStatI Interrupt Mask

1 = Mask

0 = Unmask

CCVcnStatIM

CCVcnStatI Interrupt Mask

1 = Mask

0 = Unmask

CCStatIM

CCStatI Interrupt Mask

1 = Mask

0 = Unmask

ADDRESS:

0x19

MODE:

Read/Write

BIT

NAME

LEDCtrl

LEDManual

LEDCtrl

LED Manual Control

0 = LED is OFF

1 = LED is ON

LEDManual

LED Auto/Manual Configuration

0 = LED is controlled via charger state machine.

1 = LED output is manually controlled by LEDCntl bit.

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Table 31. ThermaCfg2 Register (0x1B)

Table 32. ThermaCfg3 Register (0x1C)

ADDRESS:

0x1B

MODE:

Read/Write

BIT

NAME

T3T4IFchg[2:0]

T3T4ENset T1T2ENset

T3T4VFset

T1T2VFset

T3T4IFchg[2:0]

Fast Charge Current for T3-T4 temperature zone

000 = 0.2 x IFChg

001 = 0.3 x IFChg

010 = 0.4 x IFChg

011 = 0.5 x IFChg

100 = 0.6 x IFChg

101 = 0.7 x IFChg

110 = 0.8 x IFChg

111 = 1.0 x IFChg

T3T4ENset

JEITA charger On/Off in T3-T4 zone. (Only valid if JEITACtrSet = 1)

0 = JEITA turns charger off in T3-T4 zone

1 = JEITA doesn’t turn charger off in T3-T4 zone

T1T2ENset

JEITA charger On/Off in T1-T2 zone. (Only valid if JEITACtrSet = 1)

0 = JEITA turns charger off in T1-T2 zone

1 = JEITA doesn’t turn charger off in T1-T2 zone

T3T4VFset

JEITA voltage scaling enable in T3-T4. (Only valid if JEITACtrSet = 1)

1 = Enabled

0 = Disabled

T1T2VFset

JEITA voltage scaling enabled in T1-T2. (Only valid if JEITACtrSet = 1)

1 = Enabled

0 = Disabled

ADDRESS:

0x1C

MODE:

Read/Write Unless Otherwise Noted

BIT

NAME

JEITACtrSet

WarmCoolSel

JEITACtrSet

JEITA Control Enable

0 = JEITA status Not affect charger

1 = JEITA status affects charger settings (See register ThermaCfg2)

WarmCoolSel

Warm/Cool JEITA Zone Thresholds Select (Read Only).

0 = 45 °C Warm, 10 °C Cool

1 = 25 °C Warm, 10 °C Cool

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Table 34. ChargerCtrl2 Register (0x1E)

Table 35. ChargerCtrl3 Register (0x1F)

ADDRESS:

0x1E

MODE:

Read/Write or Ready-Only if AppWrtPrtct = †œ(1) Protected† (See Table 61)

BIT

NAME

VPchg[2:0]

IPChg[1:0]

ChgDone[1:0]

VPchg[2:0]

Pre-charge Voltage Threshold Setting

000 = 5.7V

001 = 5.8V

010 = 5.9V

111 = 6.0V

100 = 6.1V

101 = 6.2V

110 = 6.3V

111 = 6.4V

IPChg[1:0]

Pre-charge Current Setting

00 = 0.05 x IFChg

01 = 0.1 x IFChg

10 = 0.2 x IFChg

11 = 0.3 x IFChg

ChgDone[1:0]

Charge Done Threshold Setting

00 = 0.05 x IFChg

01 = 0.1 x IFChg

10 = 0.2 x IFChg

11 = Reserved

ADDRESS:

0x1F

MODE:

Read/Write or Ready-Only if AppWrtPrtct = †œ(1) Protected† (See Table 61)

BIT

NAME

ChgAutoSta

MtChgTmr[1:0]

FChgTmr[1:0]

PChgTmr[1:0]

ChgAutoSta

Charger Auto-Restart Control

0 = Charger remains in maintain charge done even when V

BAT

is less than BAT recharge threshold.

1 = Charger automatically restarts when V

BAT

drops below BAT recharge threshold.

MtChgTmr[1:0]

Maintain Charge Timer Setting

00 = 0min

01 = 15min

10 = 30min

11 = 60min

FChgTmr[1:0]

Fast- Charge Timer Setting

00 = 75min

01 = 150min

10 = 300min

11 = 600min

PChgTmr[1:0]

Pre-charge Timer Setting

00 = 30min

01 = 60min

10 = 120min

11 = 240min

MAX14748

USB Type-C Charger

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Table 36. ChargerCtrl4 Register (0x20)

Table 37. CurLimCtrl Register (0x21)

ADDRESS:

0x20

MODE:

Read-Only

Read/Write or Ready-Only if AppWrtPrtct =

†œ(1) Protected† (See Table 61)

BIT

NAME

WeakBatStat[2:0]

WeakBatEn

WeakBatStat[2:0]

Weak Battery FSM status

000 = Idle, charger is not SDP

001 = Battery condition check

010 = Weak Battery 2-minute counter running

011 = Good Battery.

100 = Weak Battery 2-minute counter expired

101-111 = Reserved

WeakBatEna

Weak Battery FSM Enable

0 = Disable

1 = Enable

ADDRESS:

0x21

MODE:

Read/Write

BIT

NAME

CurLim1Frc

FSUSMsk

CurLim1Set[4:0]

CurLim1Frc

Forced Input Current Limit Enable. When CurLim1Frc is 1, the input current limit is by the CurLim1Set[4:0].

0 = Not forced

1 = Forced

FSUSMsk

FSUS pin function mask. If FSUSMsk is 1, FSUS pin status is ignored.

0 = FSUS pin function enabled

1 = FSUS pin function disabled

CurLim1Set[4:0]

Forced Input Current Limit Value. The input current limit is forced to this value if CurLim1Frc is set to 1.

00000 = 0.10A

00001 = 0.20A

†¦

11101 = 3.00A

11110 = Reserved

11111 = Reserved

MAX14748

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Table 38. CurLimStatus Register (0x22)

Table 39. BBCFG1 Register (0x23)

ADDRESS:

0x22

MODE:

Read Only

BIT

NAME

CurLim2Rb[2:0]

SpvChgIlim[4:0]

CurLim2Rb[2:0]

Active Charger/Boost current as percent of the value set by R

SET

0 = 20%

1 = 30%

2 = 40%

3 = 50%

4 = 60%

5 = 70%

6 = 80%

7 = 100%

SpvChgIlim[4:0]

SpvChgIlim[4:0] shows the actual input current limit currently set.

00000 = 0.10A

00001 = 0.20A

†¦

11101 = 3.00A

11110 = Reserved

11111 = Reserved

ADDRESS:

0x23

MODE:

Read/Write or Ready-Only if AppWrtPrtct = †œ(1) Protected† (See Table 61)

BIT

NAME

BoostRComp[3:0]

BoostRComp[3:0]

Sets the internal compensation resistor for the boost mode

0000 = 9.5kW

0001 = 17.3kW

0010 = 25.3kW

0011 = 33.2kW

0100 = 41.4kW

0101 = 49.2kW

0110 = 57.3kW

0111 = 65.1kW

1000 = 73.6kW

1001 = 81.4kW

1010 = 89.4kW

1011 = 97.2kW

1100 = 105.5kW

1101 = 113.3kW

1110 = 121.4kW

1111 = 129.2kW

MAX14748

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Table 41. BCCtrl1 Register (0x25)

ADDRESS:

0x25

MODE:

Read/Write

BIT

NAME

DCD2s

SfOutLvl

ADC3PDet

SfOutCtrl[1:0]

ChgDetMan

ChgDetEn

DCD2s

DCD2s sets the timing of DCD in BC1.2

0 = standard

1 = 2s

SfOutLvl

SFOUT Voltage Level Select

0 = 5V

1 = 3.3V

ADC3PDet

3A DCP Detection Enable (adds detection step after BC1.2 completes to detect presence of 3A DCP)

0 = Not Enabled

1 = Enabled

SfOutCtrl[1:0]

Safe Out LDO SFOUT Control

00 = Always Disabled

01 = On if a valid CHGIN voltage is present

10 =Turns on under following conditions.

a. ChgDetEn = 1, CHGIN is valid, and BC1.2 FSM Detection is finished

b. ChgDetEn = 0, and CHGIN is valid

11: RFU

Note: CHGIN valid can be external CHGIN voltage or CHGIN voltage generated by reverse buck in Attached.

SRC_CCx mode. A system that supports power swap must not use SFOUT LDO to supply USB transceiver.

According to USB PD specification, CHGIN will collapse during power swap. This turns off SFOUT LDO which is

supplied from CHGIN, and kills USB communication.

ChgDetMan

ChgDetMan forces manual run of charger detection. (Bit auto-resets to 0)

0 = Not enabled

1 = Request manual run of charger detection

ChgDetEn

Charger Detection Enable

0 = Not enabled

1 = Enabled (charger detection runs every time V

CHGIN

> V

BDET

and DetAbrt = 0)

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Table 43. CCCtrl1 Register (0x27)

Table 42. Reserved Register (0x26)

ADDRESS:

0x27

MODE:

Read/Write

BIT

NAME

CCSnkSrc

CCDbgEn

CCAudEn

CCDetEn

CCSnkSrc

Allow State machine to enter Source Mode (DFP) detection. Note USB PD role swap is allowed to enter Source

mode.

0 = Disable

1 = Enabled

CCDbgEn

Enable Detection of Type-C Debug Adapter

0 = Disabled

1 = Enabled

CCAudEn

Enable Detection of Type-C Audio Adapter

0 = Disabled

1 = Enabled

CCDetEn

Enable CC Pin Detection - Force State Machine to Disabled State.

0 = Disabled

1 = Enabled

ADDRESS:

0x26

MODE:

Read Only

BIT

NAME

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Maxim Integrated •”‚

Table 44. CCCtrl2 Register (0x28)

ADDRESS:

0x28

MODE:

Read/Write

BIT

NAME

CCForceError SnkAttachedLock CCSnkSrcSwp CCSrcSnkSwp CCVcnSwp CCVcnEn CCSrcRst CCSnkRst

CCForceError

Bit resets to 0 after a write (This bit resets to 0 automatically when action is done)

0 = No action

1 = Force transition to ErrorRecovery state.

SnkAttachedLock

Bit resets to 0 after a minimum of 1.1s

0 = Exit Attached.SNK* state when V

CHGIN

< V

BDET

for more than t

PDDEB

1 = Locked in Attached.SNK* state for a minimum of 1.1s if VBUS not present

CCSnkSrcSwp

USB PD Power role swap from Source to Sink. This bit must be written to 0 once the USB PD controller

completes the power role swap sequence

0 = No Swap Requested

1 = Swap Requested

CCSrcSnkSwp

USB PD Power role swap from Sink to Source. This bit must be written to 0 once the USB PD controller

completes the power role swap sequence

0 = No Swap Requested

1 = Swap Requested

CCVcnSwp

Signal State Machine to Swap V

CONN

roles. Bit resets to 0 after a write (Note this bit will reset to 0

automatically when action is done)

0 = No change in V

CONN

role

1 = force change in V

CONN

CCVcnEn

Force state of V

CONN

0 = Force V

CONN

off (both external Buck converter and V

CONN

switch)

1 = Automatic operation based on State Machine

CCSrcRst

Force a reset of the State Machine - Immediate transition to Unattached.SRC* state. Bit resets to 0 after a write.

0 = No reset

1 = Request reset

CCSnkRst

Force a reset of the State Machine - Immediate transition to Unattached.SNK* state. Bit resets to 0 after a write.

0 = No reset

1 = Request reset

* Attached.SNK, Unattached.SRC, and Unattached.SNK are defined in USB Type-C Specificaiton Release 1.1.

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Table 45. CCCtrl3 Register (0x29)

Table 46. CHGINILim1 Register (0x2A)

ADDRESS:

0x29

MODE:

Read/Write

BIT

NAME

CCTrySnk

CCPreferSnk

CCDRPPhase[1:0]

CCTrySnk

Enable transition from AttachWait.SRC* to Try.SNK* then to Attach.SNK_CCx* or to TryWait.SRC* for DRP

that strongly prefers the SNK role. CCTrySnk has higher priority than CCPreferSnk.

0 = Disabled

1 = Enabled

CCPreferSnk

Enable transition from Unattached.SRC* to Try.SNK* then to Unattached.SNK* for DRP that strongly prefers

the SNK role.

0 = Disabled

1 = Enabled

CCDRPPhase[1:0]

Percent of time device is acting as Unattached.SRC* when CCSNKSRC = 1

00 = 35%

01 = 40%

10 = 45%

11 = 50%

ADDRESS:

0x2A

MODE:

Read Only

BIT

NAME

CHGINILim[6:0]

CHGINILim[6:0]

Status of charger input current limit set by charger detection (in 33mA step). Note that the first 4 codes are

all 100mA.

0000000 = 100mA

0000001 = 100mA

0000010 = 100mA

0000011 = 100mA

0000100 = 133mA

0000011 = 166mA

†¦

1111111 = 4059mA

* AttachWait.SRC, Try.SNK, Attached.SNK, TryWait.SRC, Unattached.SNK, and Unattached SRC are defined in USB Type-C

Specificaiton Release 1.1.

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Table 48. AICLCFG1 Register (0x2C)

Table 49. AICLCFG2 Register (0x2D)

ADDRESS:

0x2C

MODE:

Read/Write or Ready-Only if AppWrtPrtct = †œ(1) Protected† (See Table 61)

BIT

NAME

AICLEn

AICLAbort

AICLEn

AICL Enable. Writing 1 to AICLEn enables AICL operation. Note that if AICLAbort is 1, AICL operation is not

allowed. This bit auto-resets to 0.

0 = No Action

1 = AICL enabled

AICLAbort

High Priority AICL Abort.

0 = Device is allowed to run AICL by writing 1 to AICLEn.

1 = Device is NOT allowed to run AICL operation. AICL operation will be aborted if it’s already running.

ADDRESS:

0x2D

MODE:

Read/Write or Ready-Only if AppWrtPrtct = †œ(1) Protected† (See Table 61)

BIT

NAME

BYPUVLO[2:0]

AICLMaxI[4:0]

BYPUVLO[2:0]

VBUS Theshold below which AICL stops incrementing the current

000 = 3.8V

001 = 3.9V

010 = 4.0V

011 = 4.1V

100 = 4.2V

101 = 4.3V

110 = 4.4V

111 = 4.5V

AICLMaxI[4:0]

AICL Stop Current (in 100mA step)

00000 = 100mA

00001 = 200mA

†¦

11111 = 3.2A

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Table 50. AICLCFG3 Register (0x2E)

Table 51. DPDNSw Register (0x2F)

Table 52. Others Register (0x30)

ADDRESS:

0x2E

MODE:

Read/Write or Ready-Only if AppWrtPrtct = †œ(1) Protected† (See Table 61)

BIT

NAME

BYPDeb

AICLTBlk[1:0]

AICLTStep[1:0]

BYPDeb

AICL BYPUVLO[2:0] Rise Threshold Debounce Setting

0 = 500ms

1 = 200ms

AICLTBlk[1:0]

TBLANK Time Setting

00 = 500ms

01 = 1s

10 = 1.5s

11 = 5s

AICLTStep[1:0]

TSTEP Time Setting

00 = 100ms

01 = 200ms

10 = 300ms

11 = 500ms

ADDRESS:

0x2F

MODE:

Read/Write

BIT

NAME

AnSwCntl[1:0]

AnSwCntl[1:0]

AnSwCntl Analog Switch Configuration

00 = Auto. Switch is open during adapter detection. Switch closes if SDP or CDP is detected.

01 = Auto in SDP or CDP and Buck mode is detected.

10 = Switch forced open

11 = Switch forced closed

ADDRESS:

0x30

MODE:

Read/Write

BIT

NAME

USBCRSet

USBCRSet

USB-C Registers Reset. Writing 1 to USBCRSet resets registers associated with USB-C operation. (Note that

this operation opens the input limiter and turns off the boost converter temporarily.) Reset types are RST3 and

RST4. See Table 59 and Table 60 for more details. This bit auto-resets to 0.

0 = No Action

1 = Reset Registers

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Table 53. Reserved Register (0x31)

Table 54. Reserved Register (0x32)

Table 55. LowPow Register (0x33)

Table 56. Reserved Register (0x34)

Table 57. FLTSel Register (0x35)

ADDRESS:

0x31

MODE:

Read Only

BIT

NAME

ADDRESS:

0x32

MODE:

Read Only

BIT

NAME

ADDRESS:

0x33

MODE:

Read/Write

BIT

NAME

LowPowEn

LowPowAbort

LowPowEn

Low Power Mode Enable. Set LowPowEn to 1 to enter Low Power mode. Note that if LowPowAbort is 1, Low

Power Mode is not allowed. This bit auto-resets to 0.

0 = No Action

1 = Enter Low Power mode

LowPowAbort

High Priority Low Power Mode Abort

0 = Device is allowed to enter Low Power mode by writing 1 to LowPowEn.

1 = Device is NOT allowed to enter Low Power Mode. Low Power Mode will be exited if device has already

entered it.

ADDRESS:

0x34

MODE:

Read Only

BIT

NAME

ADDRESS:

0x35

MODE:

Read/Write

BIT

NAME

FLTSelect[1:0]

FLTSelect[10]

FLTIN Charger-Faulting and External Reset Function Enable

00 = No effect and internally ignored

01 = Low on FLTIN pin (60ms debounce) places the charger in Battery Fault Charge Suspend state

(ChgStat[3:0] = 1000).

1x = Falling edge on FLTIN pin resets all registers. Reset types are RST1/RST2/RST3. See Table 59 and

Table 60 for more details.

MAX14748

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RESET TYPE

RESET CONDITION

RST

1. V

CCINT

Power-On Reset

RST1

1. V

CCINT

Power-On Reset or

2. FLTIN falling edge (only if FLTSelect[1] = 1)

RST2

1. V

CCINT

Power-On Reset or

2. FLTIN falling edge (only if FLTSelect[1] = 1) or

3. VBUSDet rising edge

RST3

1. V

CCINT

Power-On Reset or

2. FLTIN falling edge (only if FLTSelect[1] = 1) or

3. USB-C reset through USBCRSet (0x30[0])

APPLICATION INDUCTANCE

( µH)

(MΩ)

SATURATION

CURRENT (A)

CURRENT

RATING (A)

SUGGESTED PARTS

3A Type-C

Adapters

2.2μH

4.2

3.7

Taiyo Yuden NRS6028T2R2NMGJ

2.2μH

3.5

2.8

BOURNS SRP4012TA-2R2M

Table 59. Reset Types

Table 58. Suggested Inductors

MAX14748

USB Type-C Charger

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Maxim Integrated •”‚

Appilications Information

Component Selection

The correct selection of external components ensures

high efficiency, low output ripple, and fast transient

response.

Inductor Selection

The MAX14748 is designed to use a 1.5μH or 2.2μH

inductor. See

for suggested inductors and

manufacturers.

BAT Capacitor Selection

BAT capacitor is required to keep the BAT voltage ripple

small and to ensure regulation loop stability. The BAT

capacitor must have low impedance at the switching

frequency. Ceramic capacitors with X5R or X7R dielectric

are highly recommended due to their small size, low ESR,

and small temperature coefficients.
BAT requires careful bypassing. In the PCB layout, place

BAT capacitor as close as possible to BAT to minimize

parasitic inductance. If making connections to BAT capacitor

through vias, ensure that the vias are rated for the

expected input current to avoid excess inductance and

resistance between the capacitor and BAT.
The recommended nominal BAT capacitance is 22μF,

however, after initial tolerance, bias voltage, aging, and

temperature derating, the effective capacitance must be

greater than 10μF. To ensure regulation loop stability, the

effective BAT capacitance should be chosen within the

range of 10μF to 30μF.

SYS Capacitor Selection

SYS capacitor acts as the output capacitor for the boost

converter when charging, and the input capacitor for

the reverse buck converter when the device is acting as

power source in DRP mode. SYS capacitor is required to

keep the SYS voltage ripple small and to ensure regu-

lation loop stability. It must have low impedance at the

switching frequency. Ceramic capacitors with X5R or X7R

dielectric are highly recommended due to their small size,

low ESR, and small temperature coefficients.
Place SYS capacitor as close as possible to SYS to minimize

parasitic inductance. If making connections to SYS

capacitor through vias, ensure that the vias are rated for

the expected input current to avoid excess inductance

and resistance between the capacitor and SYS.
The recommended nominal SYS capacitance is 40μF,

however, after initial tolerance, bias voltage, aging, and

temperature derating, the effective capacitance must be

greater than 15μF.

BYP Capacitor Selection

BYP capacitor acts as the input capacitor for the boost

con ¬verter, and the output capacitor for the reverse buck

converter. BYP capacitor reduces the current peaks

drawn from the input power source when charging while

reducing the output voltage ripple of the reverse buck

converter when it is acting as power source in DRP mode.

The impedance of the input capacitor at the switching fre-

quency should be very low. Ceramic capacitors with X5R

or X7R dielectric are highly recommended due to their

small size, low ESR, and small temperature coefficients.

MAX14748

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BYP requires careful bypassing. In the PCB layout, place

BYP capacitor as close as possible to the BYP to mini-

mize parasitic inductance. If making connections to BYP

capacitor through vias, ensure that the vias are rated for

the expected input current to avoid excess inductance

and resistance between the capacitor and BYP.
The recommended nominal BYP capacitance is 22μF,

however, after initial tolerance, bias voltage, aging, and

temperature derating, the effective capacitance must be

greater than 10μF.

CHGIN Capacitor Selection

CHGIN capacitor decouples a charge source and its

parasitic impedance. Typically, the charger source at

CHGIN is a USB connector’s VBUS. The recommended

nominal CHGIN capacitance is 1μF. Larger capacitance

at CHGIN improves the decoupling; how ¬ever, take care

not to exceed the maximum capacitance allowed by the

USB specification.
The impedance of the CHGIN at the DC-DC switching fre-

quency should be very low. Ceramic capacitors with X5R

or X7R dielectric are highly recommended due to their

small size, low ESR, and small temperature coefficients.

To fully utilize the +30V input capability of the, choose a

capacitor with a 35V or greater rating; many appli ¬cations

don’t need to utilize the full input capability of the device

and find that a 16V or 10V rated input capacitor is suf-

ficient.

BST Capacitor Selection

Choose the nominal BST capacitance to be 0.1μF. BST

capacitor is part of a charge pump that creates the high-

side gate drive for the DC-DC. It is recommended that the

BST capacitor has at least 10V rating.

PCB Layout and Routing

High switching frequencies and large peak currents

make PCB layout a very important part of design. Good

design minimizes excessive EMI on the feedback paths

and voltage gradients in the ground plane, both of which

can result in instability or regulation errors. Connect the

inductor, input capacitors, and output capacitors as close

together as possible, and keep their traces short, direct,

and wide. Keep noisy traces, such as the LX node, as

short as possible.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 60. Register Reset Types and Default Values

REGISTER

ADDRESS

REGISTER

NAME

RESET

TYPE

MAX14748

0x00

ChipID

RST1

0x3E

0x01

ChipRev

RST1

0x33

0x02

DevStatus1

RST1

STATUS*

0x03

AICLStatus

RST1

STATUS

0x04

DevStatus2

RST1

STATUS

0x05

ChgStatus

RST1

STATUS

0x06

JEITAStatus

RST1

STATUS

0x07

BCStatus

RST3

STATUS

0x08

Reserved

0x00

0x09

CCStatus1

RST3

STATUS

0x0A

CCStatus2

RST3

STATUS

0x0B

DevInt1

RST1

INT*

0x0C

AICLInt

RST1

INT

0x0D

DevInt2

RST1

INT

0x0E

ChgInt

RST1

INT

0x0F

JEITAInt

RST1

INT

0x10

BCInt

RST3

INT

0x11

CCInt

RST3

INT

0x12

DevInt1Mask

RST1

0xFF

0x13

AICLIntMask

RST1

0x40

0x14

DevInt2Mask

RST1

0x7F

0x15

ChgIntMask

RST1

0xF1

0x16

JEITAIntMask

RST1

0x19

0x17

BCIntMask

RST3

0xFF

0x18

CCIntMask

RST3

0x7F

0x19

LED_CTRL

RST1

0x00

0x1A

ThermaCfg1

RST2

0x7D

0x1B

ThermaCfg2

RST2

0xEF

0x1C

ThermaCfg3

RST2

0x02

REGISTER

ADDRESS

REGISTER

NAME

RESET

TYPE

MAX14748

0x1D

ChargerCtrl1

RST2

0x80

0x1E

ChargerCtrl2

RST2

0x10

0x1F

ChargerCtrl3

RST2

0x49

0x20

ChargerCtrl4**

RST2

0x06

0x21

CurLimCtrl

RST2

0x00

0x22

CurLimStatus

RST1

STATUS

0x23

BBCFG1

RST1

0x20

0x24

BBCFG2

RST1

0x8A

0x25

BCCtrl1

RST3

0x05

0x26

Reserved

0x00

0x27

CCCtrl1

RST3

0x19

0x28

CCCtrl2

RST3

0x04

0x29

CCCtrl3

RST3

0x08

0x2A

CHGINILim1

RST3

STATUS

0x2B

CHGINILim2

RST3

0x0B

0x2C

AICLCFG1

RST1

0x01

0x2D

AICLCFG2

RST1

0x44

0x2E

AICLCFG3

RST1

0x05

0x2F

DPDNSw

RST2

0x01

0x30

Others

RST1

0x00

0x31

Reserved

0x00

0x32

Reserved

0x00

0x33

LowPow

RST1

0x01

0x34

Reserved

0x01

0x35

FLTSel

RST

0x80

*INT and STATUS: status and interrupt register values vary

based on device operating condition.
** ChargerCtrl4 register value depends on the status of

WeakBatStat[2:0] bits.

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Table 61. Register Bit Default Values

REGISTER BITS

VALUES

CDPMaxCur

1500mA

SDPMaxCur[1:0]

500mA

CHGINILimGate

Gating

CCAudEn

Disabled

CCDbgEn

Disabled

CCSnkSrc

Enabled

JeitaCfgR[1:0]

†œ01†

CCDRPPhase[1]

35% or 40%

CCTrySnk

Enabled

SfOutCtrl[1:0]

†œ01†

ADC3PDet

Disabled

DCD2s

Standard

WarmCoolSel

45 °C/10 °C

T1T2IFchg[2:0]

0.5 x IFChg

T3T4IFchg[2:0]

1.0 x IFChg

BatReg[1:0]

8.3V

ChgEn

Disabled

JETIACtrSet

(1) Control

IPChg[1:0]

0.05 x IFChg

ChgDone[1:0]

0.05 x IFChg

ChgAutoStp

Enabled

BatReChg[1:0]

100mV

FreshBatDis

Done

ChgAutoSta

Enabled

MtChTmr[1:0]

0min

FChgTmr[1:0]

300min

PChgTmr[1:0]

60min

ChipRevH[3:0]

AppWrtPrtct

(0) Writable

VPchg[2:0]

5.8V

T3T4ENset

Enabled

T1T2ENset

Enabled

T3T4VFset

Enabled

T1T2VFset

Enabled

T2T3IFchg[2:0]

1.0 x IFChg

BoostRComp[3:0]

REGISTER BITS

VALUES

FLTSelect[1:0]

(10) Reset

BuckVSet[3:0]

5.0V

AnSwCntl[1:0]

(01) Auto

AICLTStep[1:0]

200ms

WeakBatEna

Enabled

BYPUVLO{2:0]

4.0V

AICLMax[4:0]

500mA

BYPDeb

500 µs

AICLTBlk[1:0]

1000ms

MAX14748

USB Type-C Charger

www.maximintegrated.com

Maxim Integrated •”‚

Typical Application Circuit

15W TYPE-C

ADAPTER

OVP and

CURRENT

LIMIT

CONTROL

REFERENCE

BIAS CIRCUITS

LINEAR

CHARGER

and

POWERPATH

CONTROL

PROTECTED

LDO

SYSTEM

USB

TX/RX

VCONN

SUPPLY

USB CHARGER

DETECTION

INTERFACE

USB SWITCH

BOOST-BUCK

CONTROLLER

SYSTEM

LOAD

I2C INTERFACE

AND CONTROL

LOGIC

JEITA

MANAGEMENT

SYSTEM

MICRO

SUPERSPEED

MUX

CHGIN

NVP

SET

CCINT

SFOUT

CDN, CDP

TDN, TDP

CC1, CC2

CONN

BVCEN

CDIR

VIO

THM

TPU

VTPU

BAT

FLTIN
SDA, SCL
INT
SYSOK
FSUS
LED

BYP

BREG
BST

SYS

1 µF

0.1 µF

10 µF

1 µF

0.1 µF

22 µF

10 µF

1 µF

VBUS

COMP

3.9nF

0.1 µF

Note: All capacitance values listed in this document refer to effective capacitance. Be sure to specify capacitors that will meet these

requirements under typical system operating conditions taking into consideration the effects of voltage and temperature.

Document Outline